347 lines
11 KiB
C++
347 lines
11 KiB
C++
#include "bus.hh"
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#include "io/io.hh"
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#include "util/crypto.hh"
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#include "util/log.hh"
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namespace matar {
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Bus::Bus(Private,
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std::array<uint8_t, BIOS_SIZE>&& bios,
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std::vector<uint8_t>&& rom)
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: cycle_map(init_cycle_count())
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, bios(std::move(bios))
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, rom(std::move(rom)) {
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std::string bios_hash = crypto::sha256(this->bios);
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static constexpr std::string_view expected_hash =
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"fd2547724b505f487e6dcb29ec2ecff3af35a841a77ab2e85fd87350abd36570";
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if (bios_hash != expected_hash) {
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glogger.warn("BIOS hash failed to match, run at your own risk"
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"\nExpected : {} "
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"\nGot : {}",
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expected_hash,
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bios_hash);
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}
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parse_header();
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glogger.info("Memory successfully initialised");
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glogger.info("Cartridge Title: {}", header.title);
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};
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std::shared_ptr<Bus>
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Bus::init(std::array<uint8_t, BIOS_SIZE>&& bios, std::vector<uint8_t>&& rom) {
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auto self =
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std::make_shared<Bus>(Private(), std::move(bios), std::move(rom));
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self->io = std::make_unique<IoDevices>(self);
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return self;
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}
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constexpr decltype(Bus::cycle_map)
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Bus::init_cycle_count() {
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/*
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Region Bus Read Write Cycles
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BIOS ROM 32 8/16/32 - 1/1/1
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Work RAM 32K 32 8/16/32 8/16/32 1/1/1
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I/O 32 8/16/32 8/16/32 1/1/1
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OAM 32 8/16/32 16/32 1/1/1 *
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Work RAM 256K 16 8/16/32 8/16/32 3/3/6 **
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Palette RAM 16 8/16/32 16/32 1/1/2 *
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VRAM 16 8/16/32 16/32 1/1/2 *
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GamePak ROM 16 8/16/32 - 5/5/8 **|***
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GamePak Flash 16 8/16/32 16/32 5/5/8 **|***
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GamePak SRAM 8 8 8 5 **
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Timing Notes:
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* Plus 1 cycle if GBA accesses video memory at the same time.
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** Default waitstate settings, see System Control chapter.
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*** Separate timings for sequential, and non-sequential accesses.
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One cycle equals approx. 59.59ns (ie. 16.78MHz clock).
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*/
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decltype(cycle_map) map;
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map.fill({ 1, 1, 1, 1 });
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/* used fill instead of this
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map[BIOS_REGION] = { 1, 1, 1, 1 };
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map[CHIP_WRAM_REGION] = { 1, 1, 1, 1 };
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map[IO_REGION] = { 1, 1, 1, 1 };
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map[OAM_REGION] = { 1, 1, 1, 1 };
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*/
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map[3] = { 1, 1, 1, 1 };
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map[BOARD_WRAM_REGION] = { .n16 = 3, .n32 = 6, .s16 = 3, .s32 = 6 };
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map[PALETTE_RAM_REGION] = { .n16 = 1, .n32 = 2, .s16 = 1, .s32 = 2 };
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map[VRAM_REGION] = { .n16 = 1, .n32 = 2, .s16 = 1, .s32 = 2 };
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// TODO: GamePak access cycles
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return map;
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}
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template<typename T>
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std::optional<T>
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Bus::read(uint32_t address) const {
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// this is cleaned than std::enable_if
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static_assert(std::is_same_v<T, uint8_t> || std::is_same_v<T, uint16_t> ||
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std::is_same_v<T, uint32_t>,
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"Can only read uint8_t, uin16_t or uint32_t");
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constexpr int N = std::is_same_v<T, uint8_t> ? 1
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: std::is_same_v<T, uint16_t> ? 2
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: std::is_same_v<T, uint32_t> ? 4
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: 0;
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switch (address >> 24 & 0xF) {
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#define MATCHES(AREA, area) \
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case AREA##_REGION: { \
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uint32_t i = address - AREA##_START; \
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if (i > area.size() - N) \
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break; \
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if constexpr (std::is_same_v<T, uint8_t>) \
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return area[i]; \
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else if constexpr (std::is_same_v<T, uint16_t>) \
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return area[i] | area[i + 1] << 8; \
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else if constexpr (std::is_same_v<T, uint32_t>) \
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return area[i] | area[i + 1] << 8 | area[i + 2] << 16 | \
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area[i + 3] << 24; \
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}
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#define MATCHES_PAK(AREA, area) \
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case AREA##_REGION + 1: \
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MATCHES(AREA, area)
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MATCHES(BIOS, bios)
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MATCHES(BOARD_WRAM, board_wram)
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MATCHES(CHIP_WRAM, chip_wram)
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MATCHES(PALETTE_RAM, palette_ram)
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MATCHES(VRAM, vram)
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MATCHES(OAM_OBJ_ATTR, oam_obj_attr)
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MATCHES_PAK(ROM_0, rom)
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MATCHES_PAK(ROM_1, rom)
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MATCHES_PAK(ROM_2, rom)
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#undef MATCHES_PAK
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#undef MATCHES
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}
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glogger.error("Invalid memory region read");
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return {};
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}
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template<typename T>
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void
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Bus::write(uint32_t address, T value) {
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static_assert(std::is_same_v<T, uint8_t> || std::is_same_v<T, uint16_t> ||
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std::is_same_v<T, uint32_t>,
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"Can only write uint8_t, uin16_t or uint32_t");
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constexpr int N = std::is_same_v<T, uint8_t> ? 1
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: std::is_same_v<T, uint16_t> ? 2
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: std::is_same_v<T, uint32_t> ? 4
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: 0;
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switch (address >> 24 & 0xF) {
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#define MATCHES(AREA, area) \
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case AREA##_REGION: { \
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uint32_t i = address - AREA##_START; \
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if (i > area.size() - N) \
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break; \
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if constexpr (std::is_same_v<T, uint8_t>) { \
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area[i] = value; \
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} else if constexpr (std::is_same_v<T, uint16_t>) { \
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area[i] = value & 0xFF; \
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area[i + 1] = value >> 8 & 0xFF; \
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} else if constexpr (std::is_same_v<T, uint32_t>) { \
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area[i] = value & 0xFF; \
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area[i + 1] = value >> 8 & 0xFF; \
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area[i + 2] = value >> 16 & 0xFF; \
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area[i + 3] = value >> 24 & 0xFF; \
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} \
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return; \
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}
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MATCHES(BOARD_WRAM, board_wram)
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MATCHES(CHIP_WRAM, chip_wram)
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MATCHES(PALETTE_RAM, palette_ram)
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MATCHES(VRAM, vram)
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MATCHES(OAM_OBJ_ATTR, oam_obj_attr)
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#undef MATCHES
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}
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glogger.error("Invalid memory region written");
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}
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uint8_t
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Bus::read_byte(uint32_t address) {
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if (address >= IO_START && address <= IO_END)
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return io->read_byte(address);
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return read<uint8_t>(address).value_or(0xFF);
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}
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void
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Bus::write_byte(uint32_t address, uint8_t byte) {
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if (address >= IO_START && address <= IO_END) {
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io->write_byte(address, byte);
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return;
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}
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write<uint8_t>(address, byte);
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}
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uint16_t
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Bus::read_halfword(uint32_t address) {
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if (address & 0b01)
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glogger.warn("Reading a non aligned halfword address");
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if (address >= IO_START && address <= IO_END)
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return io->read_halfword(address);
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return read<uint16_t>(address).value_or(0xFFFF);
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}
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void
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Bus::write_halfword(uint32_t address, uint16_t halfword) {
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if (address & 0b01)
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glogger.warn("Writing to a non aligned halfword address");
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if (address >= IO_START && address <= IO_END) {
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io->write_halfword(address, halfword);
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return;
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}
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write<uint16_t>(address, halfword);
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}
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uint32_t
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Bus::read_word(uint32_t address) {
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if (address & 0b11)
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glogger.warn("Reading a non aligned word address");
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if (address >= IO_START && address <= IO_END)
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return io->read_word(address);
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return read<uint32_t>(address).value_or(0xFFFFFFFF);
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}
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void
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Bus::write_word(uint32_t address, uint32_t word) {
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if (address & 0b11)
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glogger.warn("Writing to a non aligned word address");
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if (address >= IO_START && address <= IO_END) {
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io->write_word(address, word);
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return;
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}
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write<uint32_t>(address, word);
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}
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void
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Bus::parse_header() {
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if (rom.size() < header.HEADER_SIZE) {
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throw std::out_of_range(
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"ROM is not large enough to even have a header");
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}
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// entrypoint
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header.entrypoint =
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rom[0x00] | rom[0x01] << 8 | rom[0x02] << 16 | rom[0x03] << 24;
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// nintendo logo
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if (rom[0x9C] != 0x21)
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glogger.info("HEADER: BIOS debugger bits not set to 0");
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// game info
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header.title = std::string(&rom[0xA0], &rom[0xA0 + 12]);
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switch (rom[0xAC]) {
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case 'A':
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header.unique_code = Header::UniqueCode::Old;
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break;
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case 'B':
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header.unique_code = Header::UniqueCode::New;
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break;
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case 'C':
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header.unique_code = Header::UniqueCode::Newer;
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break;
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case 'F':
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header.unique_code = Header::UniqueCode::Famicom;
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break;
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case 'K':
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header.unique_code = Header::UniqueCode::YoshiKoro;
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break;
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case 'P':
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header.unique_code = Header::UniqueCode::Ereader;
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break;
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case 'R':
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header.unique_code = Header::UniqueCode::Warioware;
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break;
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case 'U':
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header.unique_code = Header::UniqueCode::Boktai;
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break;
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case 'V':
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header.unique_code = Header::UniqueCode::DrillDozer;
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break;
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default:
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glogger.error("HEADER: invalid unique code: {}", rom[0xAC]);
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}
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header.title_code = std::string(&rom[0xAD], &rom[0xAE]);
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switch (rom[0xAF]) {
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case 'J':
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header.i18n = Header::I18n::Japan;
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break;
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case 'P':
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header.i18n = Header::I18n::Europe;
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break;
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case 'F':
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header.i18n = Header::I18n::French;
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break;
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case 'S':
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header.i18n = Header::I18n::Spanish;
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break;
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case 'E':
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header.i18n = Header::I18n::Usa;
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break;
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case 'D':
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header.i18n = Header::I18n::German;
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break;
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case 'I':
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header.i18n = Header::I18n::Italian;
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break;
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default:
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glogger.error("HEADER: invalid destination/language: {}",
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rom[0xAF]);
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}
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if (rom[0xB2] != 0x96)
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glogger.error("HEADER: invalid fixed byte at 0xB2");
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for (uint32_t i = 0xB5; i < 0xBC; i++) {
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if (rom[i] != 0x00)
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glogger.error("HEADER: invalid fixed bytes at 0xB5");
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}
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header.version = rom[0xBC];
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// checksum
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{
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uint32_t i = 0xA0, chk = 0;
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while (i <= 0xBC)
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chk -= rom[i++];
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chk -= 0x19;
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chk &= 0xFF;
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if (chk != rom[0xBD])
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glogger.error("HEADER: checksum does not match");
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}
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// multiboot not required right now
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}
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}
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