1078 lines
27 KiB
C++
1078 lines
27 KiB
C++
#define MATAR_CPU_TESTS
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#include "cpu/cpu-impl.hh"
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#undef MATAR_CPU_TESTS
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#include "util/bits.hh"
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#include <catch2/catch_test_macros.hpp>
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#include <limits>
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#include <variant>
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using namespace matar;
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class CpuFixture {
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public:
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CpuFixture()
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: cpu(Bus(Memory(std::array<uint8_t, Memory::BIOS_SIZE>(),
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std::vector<uint8_t>(Header::HEADER_SIZE)))) {}
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protected:
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void exec(arm::InstructionData data, Condition condition = Condition::AL) {
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arm::Instruction instruction(condition, data);
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cpu.exec(instruction);
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}
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void reset(uint32_t value = 0) {
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cpu.pc = value + arm::INSTRUCTION_SIZE * 2;
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}
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CpuImpl cpu;
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private:
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class Null : public std::streambuf {
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public:
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int overflow(int c) override { return c; }
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};
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};
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#define TAG "[arm][execution]"
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using namespace arm;
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TEST_CASE_METHOD(CpuFixture, "Branch and Exchange", TAG) {
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InstructionData data = BranchAndExchange{ .rn = 3 };
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cpu.gpr[3] = 342890;
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exec(data);
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CHECK(cpu.pc == 342890);
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}
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TEST_CASE_METHOD(CpuFixture, "Branch", TAG) {
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InstructionData data = Branch{ .link = false, .offset = 3489748 };
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Branch* branch = std::get_if<Branch>(&data);
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exec(data);
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CHECK(cpu.pc == 3489748);
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CHECK(cpu.gpr[14] == 0);
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// with link
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reset();
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branch->link = true;
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exec(data);
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CHECK(cpu.pc == 3489748);
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CHECK(cpu.gpr[14] == 0 + INSTRUCTION_SIZE);
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}
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TEST_CASE_METHOD(CpuFixture, "Multiply", TAG) {
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InstructionData data = Multiply{
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.rm = 10, .rs = 11, .rn = 3, .rd = 5, .set = false, .acc = false
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};
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Multiply* multiply = std::get_if<Multiply>(&data);
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cpu.gpr[10] = 234912349;
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cpu.gpr[11] = 124897;
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cpu.gpr[3] = 99999;
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{
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uint32_t result = 234912349ull * 124897ull & 0xFFFFFFFF;
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exec(data);
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CHECK(cpu.gpr[5] == result);
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}
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// with accumulate
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{
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uint32_t result = (234912349ull * 124897ull + 99999ull) & 0xFFFFFFFF;
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multiply->acc = true;
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exec(data);
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CHECK(cpu.gpr[5] == result);
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}
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// with set
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{
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uint32_t result = (234912349ull * 124897ull + 99999ull) & 0xFFFFFFFF;
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multiply->set = true;
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exec(data);
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CHECK(cpu.gpr[5] == result);
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CHECK(cpu.cpsr.n() == get_bit(result, 31));
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}
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// with set and zero
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{
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cpu.gpr[10] = 0;
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cpu.gpr[3] = 0;
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exec(data);
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CHECK(cpu.gpr[5] == 0);
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CHECK(cpu.cpsr.n() == false);
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CHECK(cpu.cpsr.z() == true);
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}
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}
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TEST_CASE_METHOD(CpuFixture, "Multiply Long", TAG) {
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InstructionData data = MultiplyLong{ .rm = 10,
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.rs = 11,
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.rdlo = 3,
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.rdhi = 5,
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.set = false,
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.acc = false,
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.uns = true };
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MultiplyLong* multiply_long = std::get_if<MultiplyLong>(&data);
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cpu.gpr[10] = 234912349;
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cpu.gpr[11] = 124897;
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// unsigned
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{
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uint64_t result = 234912349ull * 124897ull;
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exec(data);
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CHECK(cpu.gpr[3] == bit_range(result, 0, 31));
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CHECK(cpu.gpr[5] == bit_range(result, 32, 63));
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}
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// signed
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{
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int64_t result = 234912349ll * -124897ll;
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cpu.gpr[11] *= -1;
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multiply_long->uns = false;
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exec(data);
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CHECK(cpu.gpr[3] == static_cast<uint32_t>(bit_range(result, 0, 31)));
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CHECK(cpu.gpr[5] == static_cast<uint32_t>(bit_range(result, 32, 63)));
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}
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// accumulate
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{
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cpu.gpr[3] = 99999;
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cpu.gpr[5] = -444333391;
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int64_t result =
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234912349ll * -124897ll + (99999ll | -444333391ll << 32);
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multiply_long->acc = true;
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exec(data);
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CHECK(cpu.gpr[3] == static_cast<uint32_t>(bit_range(result, 0, 31)));
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CHECK(cpu.gpr[5] == static_cast<uint32_t>(bit_range(result, 32, 63)));
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}
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// set
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{
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cpu.gpr[3] = 99999;
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cpu.gpr[5] = -444333391;
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int64_t result =
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234912349ll * -124897ll + (99999ll | -444333391ll << 32);
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multiply_long->set = true;
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exec(data);
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CHECK(cpu.gpr[3] == static_cast<uint32_t>(bit_range(result, 0, 31)));
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CHECK(cpu.gpr[5] == static_cast<uint32_t>(bit_range(result, 32, 63)));
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CHECK(cpu.cpsr.n() == true);
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CHECK(cpu.cpsr.z() == false);
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}
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// zero
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{
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cpu.gpr[10] = 0;
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cpu.gpr[5] = 0;
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cpu.gpr[3] = 0;
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exec(data);
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CHECK(cpu.gpr[3] == 0);
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CHECK(cpu.gpr[5] == 0);
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CHECK(cpu.cpsr.n() == false);
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CHECK(cpu.cpsr.z() == true);
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}
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}
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TEST_CASE_METHOD(CpuFixture, "Single Data Swap", TAG) {
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InstructionData data =
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SingleDataSwap{ .rm = 3, .rd = 4, .rn = 9, .byte = false };
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SingleDataSwap* swap = std::get_if<SingleDataSwap>(&data);
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cpu.gpr[9] = 0x3FED;
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cpu.gpr[3] = 94235087;
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cpu.gpr[3] = -259039045;
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cpu.bus->write_word(cpu.gpr[9], 3241011111);
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SECTION("word") {
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exec(data);
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CHECK(cpu.gpr[4] == 3241011111);
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CHECK(cpu.bus->read_word(cpu.gpr[9]) ==
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static_cast<uint32_t>(-259039045));
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}
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SECTION("byte") {
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swap->byte = true;
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exec(data);
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CHECK(cpu.gpr[4] == (3241011111 & 0xFF));
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CHECK(cpu.bus->read_byte(cpu.gpr[9]) ==
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static_cast<uint8_t>(-259039045 & 0xFF));
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}
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}
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TEST_CASE_METHOD(CpuFixture, "Single Data Transfer", TAG) {
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InstructionData data =
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SingleDataTransfer{ .offset = Shift{ .rm = 3,
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.data =
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ShiftData{
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.type = ShiftType::ROR,
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.immediate = true,
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.operand = 29,
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} },
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.rd = 5,
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.rn = 7,
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.load = true,
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.write = false,
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.byte = false,
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.up = true,
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.pre = true };
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SingleDataTransfer* data_transfer = std::get_if<SingleDataTransfer>(&data);
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cpu.gpr[3] = 1596;
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cpu.gpr[7] = 6;
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cpu.gpr[5] = -911111;
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// shifted register (immediate)
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{
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// 12768 + 6
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cpu.bus->write_word(12774, 95995);
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exec(data);
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CHECK(cpu.gpr[5] == 95995);
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cpu.gpr[5] = 0;
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}
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// shifted register (register)
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{
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data_transfer->offset = Shift{ .rm = 3,
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.data = ShiftData{
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.type = ShiftType::LSL,
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.immediate = false,
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.operand = 12,
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} };
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cpu.gpr[12] = 2;
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// 6384 + 6
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cpu.bus->write_word(6390, 3948123487);
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exec(data);
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CHECK(cpu.gpr[5] == 3948123487);
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}
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// immediate
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{
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data_transfer->offset = static_cast<uint16_t>(3489);
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// 6 + 3489
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cpu.bus->write_word(3495, 68795467);
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exec(data);
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CHECK(cpu.gpr[5] == 68795467);
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}
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// down
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{
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cpu.gpr[7] = 18044;
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data_transfer->up = false;
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// 18044 - 3489
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cpu.bus->write_word(14555, 5949595);
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exec(data);
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CHECK(cpu.gpr[5] == 5949595);
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// no write back
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CHECK(cpu.gpr[7] == 18044);
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}
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// write
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{
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data_transfer->write = true;
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cpu.bus->write_word(14555, 967844);
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exec(data);
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CHECK(cpu.gpr[5] == 967844);
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// 18044 - 3489
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CHECK(cpu.gpr[7] == 14555);
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}
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// post
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{
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data_transfer->write = false;
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data_transfer->pre = false;
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cpu.bus->write_word(14555, 61119);
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exec(data);
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CHECK(cpu.gpr[5] == 61119);
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// 14555 - 3489
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CHECK(cpu.gpr[7] == 11066);
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}
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// store
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{
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data_transfer->load = false;
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exec(data);
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CHECK(cpu.bus->read_word(11066) == 61119);
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// 11066 - 3489
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CHECK(cpu.gpr[7] == 7577);
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}
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// r15 as rn
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{
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data_transfer->rn = cpu.PC_INDEX;
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cpu.gpr[15] = 7577;
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exec(data);
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CHECK(cpu.bus->read_word(7577 - 2 * INSTRUCTION_SIZE) == 61119);
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// 7577 - 3489
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CHECK(cpu.gpr[15] == 4088 - 2 * INSTRUCTION_SIZE);
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// cleanup
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data_transfer->rn = 7;
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}
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// r15 as rd
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{
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// 4088
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data_transfer->rd = cpu.PC_INDEX;
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cpu.gpr[15] = 444444;
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exec(data);
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CHECK(cpu.bus->read_word(7577 + INSTRUCTION_SIZE) == 444444);
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// 7577 - 3489
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CHECK(cpu.gpr[7] == 4088 + INSTRUCTION_SIZE);
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// cleanup
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data_transfer->rd = 5;
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cpu.gpr[7] -= INSTRUCTION_SIZE;
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}
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// byte
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{
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data_transfer->byte = true;
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cpu.gpr[5] = 458267584;
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exec(data);
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CHECK(cpu.bus->read_word(4088) == (458267584 & 0xFF));
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// 4088 - 3489
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CHECK(cpu.gpr[7] == 599);
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}
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}
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TEST_CASE_METHOD(CpuFixture, "Halfword Transfer", TAG) {
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InstructionData data = HalfwordTransfer{ .offset = 12,
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.half = true,
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.sign = false,
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.rd = 11,
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.rn = 10,
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.load = true,
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.write = false,
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.imm = false,
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.up = true,
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.pre = true };
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HalfwordTransfer* hw_transfer = std::get_if<HalfwordTransfer>(&data);
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cpu.gpr[12] = 8404;
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cpu.gpr[11] = 459058287;
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cpu.gpr[10] = 900;
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// register offset
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{
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// 900 + 8404
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cpu.bus->write_word(9304, 3948123487);
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exec(data);
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CHECK(cpu.gpr[11] == (3948123487 & 0xFFFF));
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}
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// immediate offset
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{
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hw_transfer->imm = true;
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hw_transfer->offset = 167;
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// 900 + 167
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cpu.bus->write_word(1067, 594633302);
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exec(data);
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CHECK(cpu.gpr[11] == (594633302 & 0xFFFF));
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}
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// down
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{
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hw_transfer->up = false;
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// 900 - 167
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cpu.bus->write_word(733, 222221);
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exec(data);
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CHECK(cpu.gpr[11] == (222221 & 0xFFFF));
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// no write back
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CHECK(cpu.gpr[10] == 900);
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}
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// write
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{
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hw_transfer->write = true;
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// 900 - 167
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cpu.bus->write_word(733, 100000005);
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exec(data);
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CHECK(cpu.gpr[11] == (100000005 & 0xFFFF));
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// 900 - 167
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CHECK(cpu.gpr[10] == 733);
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}
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// post
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{
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hw_transfer->pre = false;
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hw_transfer->write = false;
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cpu.bus->write_word(733, 6111909);
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exec(data);
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CHECK(cpu.gpr[11] == (6111909 & 0xFFFF));
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// 733 - 167
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CHECK(cpu.gpr[10] == 566);
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}
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// store
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{
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hw_transfer->load = false;
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exec(data);
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CHECK(cpu.bus->read_halfword(566) == (6111909 & 0xFFFF));
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// 566 - 167
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CHECK(cpu.gpr[10] == 399);
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}
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// r15 as rn
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{
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hw_transfer->rn = cpu.PC_INDEX;
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cpu.gpr[15] = 399;
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exec(data);
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CHECK(cpu.bus->read_halfword(399 - 2 * INSTRUCTION_SIZE) ==
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(6111909 & 0xFFFF));
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// 399 - 167
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CHECK(cpu.gpr[15] == 232 - 2 * INSTRUCTION_SIZE);
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// cleanup
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hw_transfer->rn = 10;
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}
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// r15 as rd
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{
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hw_transfer->rd = cpu.PC_INDEX;
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cpu.gpr[15] = 224;
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exec(data);
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CHECK(cpu.bus->read_halfword(399 + INSTRUCTION_SIZE) == 224);
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// 399 - 167
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CHECK(cpu.gpr[10] == 232 + INSTRUCTION_SIZE);
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// cleanup
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hw_transfer->rd = 11;
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cpu.gpr[10] = 399;
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}
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// signed halfword
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{
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hw_transfer->load = true;
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hw_transfer->sign = true;
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cpu.bus->write_halfword(399, -12345);
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exec(data);
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CHECK(cpu.gpr[11] == static_cast<uint32_t>(-12345));
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// 399 - 167
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CHECK(cpu.gpr[10] == 232);
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}
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// signed byte
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{
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hw_transfer->half = false;
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cpu.bus->write_byte(232, -56);
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exec(data);
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CHECK(cpu.gpr[11] == static_cast<uint32_t>(-56));
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// 232 - 167
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CHECK(cpu.gpr[10] == 65);
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}
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}
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TEST_CASE_METHOD(CpuFixture, "Block Data Transfer", TAG) {
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InstructionData data = BlockDataTransfer{ .regs = 0b1010100111000001,
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.rn = 10,
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.load = true,
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.write = false,
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.s = false,
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.up = true,
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.pre = true };
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BlockDataTransfer* block_transfer = std::get_if<BlockDataTransfer>(&data);
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// load
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SECTION("load") {
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// populate memory
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cpu.bus->write_word(3448, 38947234);
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cpu.bus->write_word(3452, 237164);
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cpu.bus->write_word(3456, 679785111);
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cpu.bus->write_word(3460, 905895898);
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cpu.bus->write_word(3464, 131313333);
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cpu.bus->write_word(3468, 131);
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cpu.bus->write_word(3472, 989231);
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cpu.bus->write_word(3476, 6);
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auto checker = [](decltype(cpu.gpr)& gpr, uint32_t rnval = 0) {
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CHECK(gpr[0] == 237164);
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CHECK(gpr[1] == 0);
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CHECK(gpr[2] == 0);
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CHECK(gpr[3] == 0);
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CHECK(gpr[4] == 0);
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CHECK(gpr[5] == 0);
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CHECK(gpr[6] == 679785111);
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CHECK(gpr[7] == 905895898);
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CHECK(gpr[8] == 131313333);
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CHECK(gpr[9] == 0);
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CHECK(gpr[10] == rnval);
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CHECK(gpr[11] == 131);
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CHECK(gpr[12] == 0);
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CHECK(gpr[13] == 989231);
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CHECK(gpr[14] == 0);
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CHECK(gpr[15] == 6);
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|
|
for (uint8_t i = 0; i < 16; i++) {
|
|
gpr[i] = 0;
|
|
}
|
|
};
|
|
|
|
cpu.gpr[10] = 3448;
|
|
exec(data);
|
|
checker(cpu.gpr, 3448);
|
|
|
|
// with write
|
|
cpu.gpr[10] = 3448;
|
|
block_transfer->write = true;
|
|
exec(data);
|
|
checker(cpu.gpr, 3448 + INSTRUCTION_SIZE);
|
|
|
|
// decrement
|
|
block_transfer->write = false;
|
|
block_transfer->up = false;
|
|
// adjust rn
|
|
cpu.gpr[10] = 3480;
|
|
exec(data);
|
|
checker(cpu.gpr, 3480);
|
|
|
|
// with write
|
|
cpu.gpr[10] = 3480;
|
|
block_transfer->write = true;
|
|
exec(data);
|
|
checker(cpu.gpr, 3480 - INSTRUCTION_SIZE);
|
|
|
|
// post increment
|
|
block_transfer->write = false;
|
|
block_transfer->up = true;
|
|
block_transfer->pre = false;
|
|
// adjust rn
|
|
cpu.gpr[10] = 3452;
|
|
exec(data);
|
|
checker(cpu.gpr, 3452 + INSTRUCTION_SIZE);
|
|
|
|
// post decrement
|
|
block_transfer->up = false;
|
|
// adjust rn
|
|
cpu.gpr[10] = 3476;
|
|
exec(data);
|
|
checker(cpu.gpr, 3476 - INSTRUCTION_SIZE);
|
|
|
|
// with s bit
|
|
cpu.chg_mode(Mode::Fiq);
|
|
block_transfer->s = true;
|
|
CHECK(cpu.cpsr.raw() != cpu.spsr.raw());
|
|
exec(data);
|
|
CHECK(cpu.cpsr.raw() == cpu.spsr.raw());
|
|
}
|
|
|
|
// store
|
|
SECTION("store") {
|
|
block_transfer->load = false;
|
|
|
|
// populate registers
|
|
cpu.gpr[0] = 237164;
|
|
cpu.gpr[6] = 679785111;
|
|
cpu.gpr[7] = 905895898;
|
|
cpu.gpr[8] = 131313333;
|
|
cpu.gpr[11] = 131;
|
|
cpu.gpr[13] = 989231;
|
|
cpu.gpr[15] = 6;
|
|
|
|
auto checker = [this]() {
|
|
CHECK(cpu.bus->read_word(5548) == 237164);
|
|
CHECK(cpu.bus->read_word(5552) == 679785111);
|
|
CHECK(cpu.bus->read_word(5556) == 905895898);
|
|
CHECK(cpu.bus->read_word(5560) == 131313333);
|
|
CHECK(cpu.bus->read_word(5564) == 131);
|
|
CHECK(cpu.bus->read_word(5568) == 989231);
|
|
CHECK(cpu.bus->read_word(5572) == 6);
|
|
|
|
for (uint8_t i = 0; i < 8; i++)
|
|
cpu.bus->write_word(5548 + i * 4, 0);
|
|
};
|
|
|
|
cpu.gpr[10] = 5544; // base
|
|
exec(data);
|
|
checker();
|
|
|
|
// decrement
|
|
block_transfer->write = false;
|
|
block_transfer->up = false;
|
|
// adjust rn
|
|
cpu.gpr[10] = 5576;
|
|
exec(data);
|
|
checker();
|
|
|
|
// post increment
|
|
block_transfer->up = true;
|
|
block_transfer->pre = false;
|
|
// adjust rn
|
|
cpu.gpr[10] = 5548;
|
|
exec(data);
|
|
checker();
|
|
|
|
// post decrement
|
|
block_transfer->up = false;
|
|
// adjust rn
|
|
cpu.gpr[10] = 5572;
|
|
exec(data);
|
|
checker();
|
|
|
|
// with s bit
|
|
cpu.chg_mode(Mode::Fiq);
|
|
block_transfer->s = true;
|
|
cpu.chg_mode(Mode::Supervisor);
|
|
// User's R13 is different (unset at this point)
|
|
CHECK(cpu.bus->read_word(5568) == 0);
|
|
exec(data);
|
|
}
|
|
}
|
|
|
|
TEST_CASE_METHOD(CpuFixture, "PSR Transfer", TAG) {
|
|
InstructionData data = PsrTransfer{
|
|
.operand = 12,
|
|
.spsr = false,
|
|
.type = PsrTransfer::Type::Mrs,
|
|
.imm = false,
|
|
};
|
|
PsrTransfer* psr_transfer = std::get_if<PsrTransfer>(&data);
|
|
|
|
SECTION("MRS") {
|
|
cpu.gpr[12] = 12389398;
|
|
CHECK(cpu.cpsr.raw() != cpu.gpr[12]);
|
|
exec(data);
|
|
CHECK(cpu.cpsr.raw() == cpu.gpr[12]);
|
|
|
|
psr_transfer->spsr = true;
|
|
// with SPSR
|
|
CHECK(cpu.spsr.raw() != cpu.gpr[12]);
|
|
exec(data);
|
|
CHECK(cpu.spsr.raw() == cpu.gpr[12]);
|
|
}
|
|
|
|
// MSR
|
|
SECTION("MSR") {
|
|
psr_transfer->type = PsrTransfer::Type::Msr;
|
|
|
|
cpu.gpr[12] = 0;
|
|
// go to the reserved bits
|
|
cpu.gpr[12] |= 16556 << 8;
|
|
|
|
CHECK(cpu.cpsr.raw() != cpu.gpr[12]);
|
|
exec(data);
|
|
CHECK(cpu.cpsr.raw() == cpu.gpr[12]);
|
|
|
|
psr_transfer->spsr = true;
|
|
// with SPSR
|
|
CHECK(cpu.spsr.raw() != cpu.gpr[12]);
|
|
exec(data);
|
|
CHECK(cpu.spsr.raw() == cpu.gpr[12]);
|
|
}
|
|
|
|
// MSR_flg
|
|
SECTION("MSR_flg") {
|
|
psr_transfer->type = PsrTransfer::Type::Msr_flg;
|
|
|
|
cpu.gpr[12] = 1490352945;
|
|
// go to the reserved bits
|
|
|
|
exec(data);
|
|
CHECK(cpu.cpsr.n() == get_bit(1490352945, 31));
|
|
CHECK(cpu.cpsr.z() == get_bit(1490352945, 30));
|
|
CHECK(cpu.cpsr.c() == get_bit(1490352945, 29));
|
|
CHECK(cpu.cpsr.v() == get_bit(1490352945, 28));
|
|
|
|
// with SPSR and immediate operand
|
|
psr_transfer->operand = 99333394;
|
|
psr_transfer->imm = true;
|
|
psr_transfer->spsr = true;
|
|
exec(data);
|
|
CHECK(cpu.spsr.n() == get_bit(9933394, 31));
|
|
CHECK(cpu.spsr.z() == get_bit(9933394, 30));
|
|
CHECK(cpu.spsr.c() == get_bit(9933394, 29));
|
|
CHECK(cpu.spsr.v() == get_bit(9933394, 28));
|
|
}
|
|
}
|
|
|
|
TEST_CASE_METHOD(CpuFixture, "Data Processing", TAG) {
|
|
using OpCode = DataProcessing::OpCode;
|
|
|
|
InstructionData data =
|
|
DataProcessing{ .operand = Shift{ .rm = 3,
|
|
.data =
|
|
ShiftData{
|
|
.type = ShiftType::ROR,
|
|
.immediate = true,
|
|
.operand = 29,
|
|
} },
|
|
.rd = 5,
|
|
.rn = 7,
|
|
.set = true,
|
|
.opcode = OpCode::AND };
|
|
DataProcessing* processing = std::get_if<DataProcessing>(&data);
|
|
|
|
// operand 1
|
|
cpu.gpr[7] = -28717;
|
|
|
|
// AND with shifted register (imediate)
|
|
{
|
|
// rm
|
|
cpu.gpr[3] = 1596;
|
|
exec(data);
|
|
// -28717 & 12768
|
|
CHECK(cpu.gpr[5] == 448);
|
|
}
|
|
|
|
// AND with shifted register (register)
|
|
{
|
|
processing->operand = Shift{ .rm = 3,
|
|
.data = ShiftData{
|
|
.type = ShiftType::LSL,
|
|
.immediate = false,
|
|
.operand = 12,
|
|
} };
|
|
// rm
|
|
cpu.gpr[3] = 1596;
|
|
// rs
|
|
cpu.gpr[12] = 2;
|
|
exec(data);
|
|
// -28717 & 6384
|
|
CHECK(cpu.gpr[5] == 2256);
|
|
}
|
|
|
|
// same as above but with rn (oprerand 1) = 15
|
|
{
|
|
processing->rn = cpu.PC_INDEX;
|
|
cpu.gpr[15] = -2871;
|
|
exec(data);
|
|
|
|
// (-2871 + INSTRUCTION_SIZE) & 6384
|
|
CHECK(cpu.gpr[5] == ((-2871 + INSTRUCTION_SIZE) & 6384));
|
|
|
|
// cleanup
|
|
processing->rn = 7;
|
|
}
|
|
|
|
auto reset_flags = [this]() {
|
|
cpu.cpsr.set_n(false);
|
|
cpu.cpsr.set_z(false);
|
|
cpu.cpsr.set_v(false);
|
|
cpu.cpsr.set_c(false);
|
|
};
|
|
|
|
auto flags = [this, reset_flags](bool n, bool z, bool v, bool c) {
|
|
CHECK(cpu.cpsr.n() == n);
|
|
CHECK(cpu.cpsr.z() == z);
|
|
CHECK(cpu.cpsr.v() == v);
|
|
CHECK(cpu.cpsr.c() == c);
|
|
reset_flags();
|
|
};
|
|
|
|
// immediate operand
|
|
processing->operand = static_cast<uint32_t>(54924809);
|
|
// rs
|
|
cpu.gpr[12] = 2;
|
|
cpu.gpr[5] = 0;
|
|
reset_flags();
|
|
|
|
SECTION("AND (with condition check)") {
|
|
processing->opcode = OpCode::AND;
|
|
cpu.cpsr.set_z(false);
|
|
exec(data, Condition::EQ);
|
|
|
|
// condition is false
|
|
CHECK(cpu.gpr[5] == 0);
|
|
|
|
cpu.cpsr.set_z(true);
|
|
exec(data, Condition::EQ);
|
|
|
|
// -28717 & 54924809
|
|
// condition is true now
|
|
CHECK(cpu.gpr[5] == 54920705);
|
|
|
|
// check set flags
|
|
flags(false, false, false, false);
|
|
}
|
|
|
|
// TST with immediate operand
|
|
SECTION("TST") {
|
|
processing->opcode = OpCode::TST;
|
|
|
|
exec(data);
|
|
|
|
// -28717 & 54924809
|
|
CHECK(cpu.gpr[5] == 0);
|
|
|
|
// check set flags
|
|
flags(false, false, false, false);
|
|
}
|
|
|
|
SECTION("EOR (with condition check)") {
|
|
processing->opcode = OpCode::EOR;
|
|
cpu.cpsr.set_c(true);
|
|
exec(data, Condition::CC);
|
|
|
|
// condition fails
|
|
CHECK(cpu.gpr[5] == 0);
|
|
|
|
cpu.cpsr.set_c(false);
|
|
exec(data, Condition::CC);
|
|
|
|
// -28717 ^ 54924809
|
|
// condition is true now
|
|
CHECK(cpu.gpr[5] == 4240021978);
|
|
|
|
// check set flags
|
|
flags(true, false, false, false);
|
|
|
|
// check zero flag
|
|
processing->operand = static_cast<uint32_t>(-28717);
|
|
exec(data);
|
|
|
|
// -28717 ^ -28717
|
|
CHECK(cpu.gpr[5] == 0);
|
|
|
|
// check set flags
|
|
flags(false, true, false, false);
|
|
}
|
|
|
|
SECTION("TEQ") {
|
|
processing->opcode = OpCode::TEQ;
|
|
|
|
exec(data);
|
|
|
|
// -28717 ^ 54924809
|
|
CHECK(cpu.gpr[5] == 0);
|
|
|
|
// check set flags
|
|
flags(true, false, false, false);
|
|
}
|
|
|
|
SECTION("SUB") {
|
|
processing->opcode = OpCode::SUB;
|
|
exec(data);
|
|
|
|
// -28717 - 54924809
|
|
CHECK(cpu.gpr[5] == static_cast<uint32_t>(-54953526));
|
|
|
|
// check set flags
|
|
flags(true, false, false, true);
|
|
|
|
// check zero flag
|
|
processing->operand = static_cast<uint32_t>(-28717);
|
|
exec(data);
|
|
|
|
// -28717 - (-28717)
|
|
CHECK(cpu.gpr[5] == 0);
|
|
|
|
// check set flags
|
|
flags(false, true, false, true);
|
|
}
|
|
|
|
SECTION("CMP") {
|
|
processing->opcode = OpCode::CMP;
|
|
|
|
exec(data);
|
|
|
|
// -28717 - 54924809
|
|
CHECK(cpu.gpr[5] == 0);
|
|
|
|
// check set flags
|
|
flags(true, false, false, true);
|
|
}
|
|
|
|
SECTION("RSB") {
|
|
processing->opcode = OpCode::RSB;
|
|
exec(data);
|
|
|
|
// +28717 + 54924809
|
|
CHECK(cpu.gpr[5] == 54953526);
|
|
|
|
// check set flags
|
|
flags(false, false, false, false);
|
|
}
|
|
|
|
SECTION("ADD") {
|
|
processing->opcode = OpCode::ADD;
|
|
exec(data);
|
|
|
|
// -28717 + 54924809
|
|
CHECK(cpu.gpr[5] == 54896092);
|
|
|
|
// check set flags
|
|
flags(false, false, false, false);
|
|
|
|
// test zero flag
|
|
processing->operand = static_cast<uint32_t>(28717);
|
|
exec(data);
|
|
|
|
// -28717 + 28717
|
|
CHECK(cpu.gpr[5] == 0);
|
|
|
|
// check set flags
|
|
flags(false, true, false, false);
|
|
|
|
// test overflow flag
|
|
processing->operand = static_cast<uint32_t>((1u << 31) - 1);
|
|
cpu.gpr[7] = (1u << 31) - 1;
|
|
|
|
exec(data);
|
|
|
|
CHECK(cpu.gpr[5] == (1ull << 32) - 2);
|
|
|
|
// check set flags
|
|
flags(true, false, true, false);
|
|
}
|
|
|
|
SECTION("CMN") {
|
|
processing->opcode = OpCode::CMN;
|
|
|
|
exec(data);
|
|
|
|
// -28717 + 54924809
|
|
CHECK(cpu.gpr[5] == 0);
|
|
|
|
// check set flags
|
|
flags(false, false, false, false);
|
|
}
|
|
|
|
SECTION("ADC") {
|
|
processing->opcode = OpCode::ADC;
|
|
cpu.cpsr.set_c(true);
|
|
exec(data);
|
|
|
|
// -28717 + 54924809 + carry
|
|
CHECK(cpu.gpr[5] == 54896093);
|
|
|
|
// check set flags
|
|
flags(false, false, false, false);
|
|
}
|
|
|
|
SECTION("SBC") {
|
|
processing->opcode = OpCode::SBC;
|
|
cpu.cpsr.set_c(false);
|
|
exec(data);
|
|
|
|
// -28717 - 54924809 + carry - 1
|
|
CHECK(cpu.gpr[5] == static_cast<uint32_t>(-54953527));
|
|
|
|
// check set flags
|
|
flags(true, false, false, false);
|
|
}
|
|
|
|
SECTION("RSC") {
|
|
processing->opcode = OpCode::RSC;
|
|
cpu.cpsr.set_c(false);
|
|
exec(data);
|
|
|
|
// +28717 +54924809 + carry - 1
|
|
CHECK(cpu.gpr[5] == 54953525);
|
|
|
|
// check set flags
|
|
flags(false, false, false, false);
|
|
}
|
|
|
|
SECTION("ORR") {
|
|
processing->opcode = OpCode::ORR;
|
|
exec(data);
|
|
|
|
// -28717 | 54924809
|
|
CHECK(cpu.gpr[5] == static_cast<uint32_t>(-24613));
|
|
|
|
// check set flags
|
|
flags(true, false, false, false);
|
|
}
|
|
|
|
SECTION("BIC") {
|
|
processing->opcode = OpCode::BIC;
|
|
exec(data);
|
|
|
|
// -28717 & ~54924809
|
|
CHECK(cpu.gpr[5] == static_cast<uint32_t>(-54949422));
|
|
|
|
// check set flags
|
|
flags(true, false, false, false);
|
|
}
|
|
|
|
SECTION("MVN") {
|
|
processing->opcode = OpCode::MVN;
|
|
exec(data);
|
|
|
|
// ~54924809
|
|
CHECK(cpu.gpr[5] == static_cast<uint32_t>(-54924810));
|
|
|
|
// check set flags
|
|
flags(true, false, false, false);
|
|
}
|
|
|
|
SECTION("R15 as destination") {
|
|
processing->opcode = OpCode::MVN;
|
|
processing->rd = cpu.PC_INDEX;
|
|
cpu.gpr[15] = 0;
|
|
CHECK(cpu.spsr.raw() != cpu.cpsr.raw());
|
|
exec(data);
|
|
|
|
// ~54924809
|
|
CHECK(cpu.gpr[15] == static_cast<uint32_t>(-54924810));
|
|
|
|
// flags are not set
|
|
flags(false, false, false, false);
|
|
CHECK(cpu.spsr.raw() == cpu.cpsr.raw());
|
|
}
|
|
}
|
|
|
|
#undef TAG
|