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951fc40134
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tests/bus: idle cycle test
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-16 07:46:12 +05:30 |
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a7d919eea0
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massive feat: added a GDB stub for debugging
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-16 07:45:54 +05:30 |
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c22333812e
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bus (feat): add cycle accuracy
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-15 03:49:10 +05:30 |
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cb75ebf8ef
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bus: use a switch case for memory access
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-14 20:47:04 +05:30 |
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08060a767f
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cpu (feat): store three opcodes instead of one
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-14 20:27:13 +05:30 |
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bafd534671
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bus: send a weak ptr to io
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-14 20:25:36 +05:30 |
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d1df555a6a
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fix gcc build
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-14 05:48:13 +05:30 |
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9397140473
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get rid of memory.cc/.hh
also fix bus' shared pointer in cpu
TODO: put cpu in bus not the other way around
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-14 05:42:09 +05:30 |
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ffcdf5f3a7
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ci: fix by bumping actions
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-13 04:01:24 +05:30 |
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eaa4abcb90
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cpu/arm: fix MSR by changing modes
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-13 03:56:10 +05:30 |
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c4a9c5ee5e
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cpu: align PC every step
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-13 03:54:46 +05:30 |
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0029e302b2
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cpu/arm: fix block data transfer
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-13 03:54:12 +05:30 |
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08cc582f23
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io: i really ought to be working on the ppu and apu by now
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-13 03:53:25 +05:30 |
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933b622493
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io(placeholder): add naive io structure
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-11 23:30:22 +05:30 |
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8b80f818c6
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cpu/psr(chore): minor change
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-11 23:29:05 +05:30 |
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441665abad
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cpu/arm: fix single data transfer
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-11 23:28:27 +05:30 |
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1a2e101ebd
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cpu/arm: fix branch and exchange
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-11 23:27:07 +05:30 |
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f34efb183f
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cpu: fix changing modes
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-11 23:26:02 +05:30 |
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9e6b121918
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cpu/thumb: fix pc relative load
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-11 23:22:34 +05:30 |
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15c4802838
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cpu/{arm|thumb}(chore): change how branch disassembly happens
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-11 23:21:39 +05:30 |
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0062ad424b
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chore: stage bunch of size_t to uint32_t
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-11 22:58:09 +05:30 |
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028c80f6cb
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comeback(?)
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2024-06-11 22:46:48 +05:30 |
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174008f60c
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memory: bus and rom should not be writeable
so fix tests and shit
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-10-05 00:21:18 +05:30 |
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e0f7f32699
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refactor: reorganize everything
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-10-04 01:41:38 +05:30 |
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36d71a4ee2
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thumb: add execution of instructions
also arm: fix some instructions
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-30 01:31:09 +05:30 |
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03dbb7052f
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nix: bump
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-30 01:30:44 +05:30 |
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0f09874929
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cpu: get rid of the test workaround
now can we remove the pimpl?
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-27 22:43:50 +05:30 |
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03ebc6378a
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clang: make linter happy
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-27 17:36:25 +05:30 |
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5ec5e6dddc
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thumb: add disassembler
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-27 17:31:00 +05:30 |
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208527b7f8
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thumb: initialise instruction formats
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-27 01:36:05 +05:30 |
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6822e1255a
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meson: make disassembler feature true by default
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-27 01:33:51 +05:30 |
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bd91112509
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refactor: make disassembler optional
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-27 01:31:32 +05:30 |
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1baebd72f6
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refactor: make cpu-impl private when not testing
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-27 01:25:47 +05:30 |
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b55f6ee16b
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refactor: replace fmt ostreams with stringify
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-27 01:24:32 +05:30 |
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ed01ed80cd
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tests: add tests for memory
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-24 18:04:28 +05:30 |
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8e26cadc9a
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chore: revert util/crypto
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-24 17:45:19 +05:30 |
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6e56828dfd
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tests/arm/exec: test conditions
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-24 17:38:11 +05:30 |
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5fcc75bc9a
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tests: add tests for internal utilities
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-24 17:36:38 +05:30 |
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560bd5bfa1
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tests: add tests for bus
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-23 23:20:05 +05:30 |
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9cdfa90acc
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memory: remove unused functions
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-23 21:58:41 +05:30 |
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91a82eec7c
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log: encapsulate logger
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-23 21:09:44 +05:30 |
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c3bf8b0ae8
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nix: add support to build with GCC
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-23 16:07:05 +05:30 |
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6c33c77ef3
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restructure: get rid of cpu/utility
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-23 14:15:23 +05:30 |
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1e8966553f
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chore: enclose everything in namespace matar
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-21 10:52:40 +05:30 |
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1eb4a9545b
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tests: complete exec tests (for now)
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-19 08:58:11 +05:30 |
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fa96a4d09f
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tests: add execution tests
all but data processing
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-18 18:23:52 +05:30 |
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dd9dd5f116
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tests: complete disassembler tests
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-17 09:50:32 +05:30 |
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be7deb349a
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tests: [WIP] add unit tests for some of the instructions
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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2023-09-15 14:07:23 +05:30 |
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aa96237c37
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shifts are always immediate in single data transfer
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
|
2023-09-15 10:24:23 +05:30 |
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7fc6876264
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[UNTESTED] complete initial disassembler structure for ARM
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
|
2023-09-15 05:23:07 +05:30 |
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