54fc472399
bus: rewrite the private read/write methods
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2024-06-21 02:01:04 +05:30
7d3996526f
bus: separate out read/write that count cycles
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2024-06-19 14:56:23 +05:30
a7d919eea0
massive feat: added a GDB stub for debugging
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2024-06-16 07:45:54 +05:30
c22333812e
bus (feat): add cycle accuracy
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2024-06-15 03:49:10 +05:30
cb75ebf8ef
bus: use a switch case for memory access
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2024-06-14 20:47:04 +05:30
bafd534671
bus: send a weak ptr to io
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2024-06-14 20:25:36 +05:30
9397140473
get rid of memory.cc/.hh
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also fix bus' shared pointer in cpu
TODO: put cpu in bus not the other way around
Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2024-06-14 05:42:09 +05:30
ffcdf5f3a7
ci: fix by bumping actions
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2024-06-13 04:01:24 +05:30
08cc582f23
io: i really ought to be working on the ppu and apu by now
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2024-06-13 03:53:25 +05:30
0062ad424b
chore: stage bunch of size_t to uint32_t
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2024-06-11 22:58:09 +05:30
1e8966553f
chore: enclose everything in namespace matar
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2023-09-21 10:52:40 +05:30
fa96a4d09f
tests: add execution tests
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all but data processing
Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2023-09-18 18:23:52 +05:30
169723275e
replace symlinks
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2023-09-14 11:25:44 +05:30
81afd67e0b
delete symlinks
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Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2023-09-14 11:14:36 +05:30
8a04eade92
add a basic structure for disassembler + executor
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Instructions added
Branch and Exchange (BX)
Branch and Link (B)
Multiply and Accumulate (MUL, MLA)
Multiply Long and Accumulate (SMULL, SMLAL, UMULL, UMLAL)
Single data swap (SWP)
[WIP] Halfword Transfer (STRH, LDRH)
Signed-off-by: Amneesh Singh <natto@weirdnatto.in >
2023-09-13 03:44:36 +05:30
