add a basic structure for disassembler + executor

Instructions added
Branch and Exchange (BX)
Branch and Link (B)
Multiply and Accumulate (MUL, MLA)
Multiply Long and Accumulate (SMULL, SMLAL, UMULL, UMLAL)
Single data swap (SWP)
[WIP] Halfword Transfer (STRH, LDRH)

Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
This commit is contained in:
2023-09-13 03:44:36 +05:30
parent 904e2b698e
commit 8a04eade92
22 changed files with 571 additions and 50 deletions

View File

@@ -1,5 +1,6 @@
#include "psr.hh"
#include "util/bits.hh"
#include "util/log.hh"
Psr::Psr(uint32_t raw) {
psr = raw & PSR_CLEAR_RESERVED;
@@ -16,9 +17,9 @@ Psr::set_mode(Mode mode) {
psr |= static_cast<uint32_t>(mode);
}
bool
State
Psr::state() const {
return get_nth_bit(psr, 5);
return static_cast<State>(get_nth_bit(psr, 5));
}
void
@@ -47,3 +48,39 @@ GET_SET_NTH_BIT_FUNCTIONS(z, 30);
GET_SET_NTH_BIT_FUNCTIONS(n, 31);
#undef GET_SET_NTH_BIT_FUNCTIONS
bool
Psr::condition(Condition cond) const {
switch (cond) {
case Condition::EQ:
return z();
case Condition::NE:
return !z();
case Condition::CS:
return c();
case Condition::CC:
return !c();
case Condition::MI:
return n();
case Condition::PL:
return !n();
case Condition::VS:
return v();
case Condition::VC:
return !v();
case Condition::HI:
return c() && !z();
case Condition::LS:
return !c() || z();
case Condition::GE:
return n() == v();
case Condition::LT:
return n() != v();
case Condition::GT:
return !z() && (n() == v());
case Condition::LE:
return z() || (n() != v());
case Condition::AL:
return true;
}
}