add a basic structure for disassembler + executor
Instructions added Branch and Exchange (BX) Branch and Link (B) Multiply and Accumulate (MUL, MLA) Multiply Long and Accumulate (SMULL, SMLAL, UMULL, UMLAL) Single data swap (SWP) [WIP] Halfword Transfer (STRH, LDRH) Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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@@ -1,9 +1,12 @@
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#include "cpu.hh"
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#include "cpu/utility.hh"
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#include "util/log.hh"
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#include "utility.hh"
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#include <algorithm>
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#include <cstdio>
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Cpu::Cpu(Bus bus)
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using namespace logger;
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Cpu::Cpu(std::shared_ptr<Bus> bus)
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: gpr(0)
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, cpsr(0)
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, spsr(0)
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@@ -14,6 +17,7 @@ Cpu::Cpu(Bus bus)
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cpsr.set_irq_disabled(true);
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cpsr.set_fiq_disabled(true);
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cpsr.set_state(State::Arm);
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log_info("CPU successfully initialised");
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}
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/* change modes */
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@@ -103,15 +107,13 @@ Cpu::chg_mode(Mode from, Mode to) {
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cpsr.set_mode(to);
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}
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// set register
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inline uint32_t&
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Cpu::operator[](uint8_t idx) {
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// avoid unneeded complexity like index checks
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return gpr[idx];
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}
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void
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Cpu::step() {
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uint32_t insn = 0xffffffff;
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// get register
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inline const uint32_t&
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Cpu::operator[](uint8_t idx) const {
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return gpr[idx];
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if (cpsr.state() == State::Arm) {
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std::string disassembled = exec_arm(insn);
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log_info("{:#010X} : {}", gpr[15], disassembled);
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gpr[15] += ARM_INSTRUCTION_SIZE;
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}
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}
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