initial cpu structure :thonk:

Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
This commit is contained in:
2023-08-27 21:40:55 +05:30
parent ad64b1e8d1
commit 84c68a4e00
20 changed files with 449 additions and 42 deletions

61
src/cpu/arm/insruction.hh Normal file
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enum class ArmInstructionFormat {
DataProcessingAndFsrTransfer,
Multiply,
MultiplyLong,
SingleDataSwap,
BranchAndExchange,
HalfwordDataTransferRegisterOffset,
HalfwordDataTransferImmediateOffset,
SingleDataTransfer,
Undefined,
BlockDataTransfer,
Branch,
CoprocessorDataTransfer,
CoprocessorDataOperation,
CoprocessorRegisterTransfer,
SoftwareInterrupt
};
enum class Condition {
EQ = 0b0000,
NE = 0b0001,
CS = 0b0010,
CC = 0b0011,
MI = 0b0100,
PL = 0b0101,
VS = 0b0110,
VC = 0b0111,
HI = 0b1000,
LS = 0b1001,
GE = 0b1010,
LT = 0b1011,
GT = 0b1100,
LE = 0b1101,
AL = 0b1110
};
enum class OpCode {
AND = 0b0000,
EOR = 0b0001,
SUB = 0b0010,
RSB = 0b0011,
ADD = 0b0100,
ADC = 0b0101,
SBC = 0b0110,
RSC = 0b0111,
TST = 0b1000,
TEQ = 0b1001,
CMP = 0b1010,
CMN = 0b1011,
ORR = 0b1100,
MOV = 0b1101,
BIC = 0b1110,
MVN = 0b1111
};
enum class Shift {
LSL = 0b00,
LSR = 0b01,
ASR = 0b10,
ROR = 0b11
};

2
src/cpu/arm/meson.build Normal file
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lib_sources += files(
)