initial cpu structure :thonk:
Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
This commit is contained in:
61
src/cpu/arm/insruction.hh
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61
src/cpu/arm/insruction.hh
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enum class ArmInstructionFormat {
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DataProcessingAndFsrTransfer,
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Multiply,
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MultiplyLong,
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SingleDataSwap,
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BranchAndExchange,
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HalfwordDataTransferRegisterOffset,
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HalfwordDataTransferImmediateOffset,
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SingleDataTransfer,
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Undefined,
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BlockDataTransfer,
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Branch,
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CoprocessorDataTransfer,
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CoprocessorDataOperation,
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CoprocessorRegisterTransfer,
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SoftwareInterrupt
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};
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enum class Condition {
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EQ = 0b0000,
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NE = 0b0001,
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CS = 0b0010,
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CC = 0b0011,
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MI = 0b0100,
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PL = 0b0101,
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VS = 0b0110,
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VC = 0b0111,
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HI = 0b1000,
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LS = 0b1001,
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GE = 0b1010,
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LT = 0b1011,
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GT = 0b1100,
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LE = 0b1101,
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AL = 0b1110
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};
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enum class OpCode {
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AND = 0b0000,
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EOR = 0b0001,
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SUB = 0b0010,
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RSB = 0b0011,
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ADD = 0b0100,
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ADC = 0b0101,
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SBC = 0b0110,
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RSC = 0b0111,
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TST = 0b1000,
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TEQ = 0b1001,
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CMP = 0b1010,
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CMN = 0b1011,
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ORR = 0b1100,
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MOV = 0b1101,
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BIC = 0b1110,
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MVN = 0b1111
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};
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enum class Shift {
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LSL = 0b00,
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LSR = 0b01,
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ASR = 0b10,
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ROR = 0b11
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};
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2
src/cpu/arm/meson.build
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2
src/cpu/arm/meson.build
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lib_sources += files(
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)
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