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bus: separate out read/write that count cycles

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Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
This commit is contained in:
Amneesh Singh
2024-06-19 14:53:31 +05:30
parent f5aa73e7ca
commit 7d3996526f
9 changed files with 262 additions and 282 deletions
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38
include/cpu/cpu.hh
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@@ -24,12 +24,17 @@ class Cpu {
void step();
void chg_mode(const Mode to);
inline bool is_halted() { return halted; }
inline void resume() { halted = false; }
#ifdef GDB_DEBUG
bool breakpoint_reached() {
if (breakpoints.contains(pc - 2 * (cpsr.state() == State::Arm
? arm::INSTRUCTION_SIZE
: thumb::INSTRUCTION_SIZE))) {
return true;
}
return false;
}
#endif
private:
bool halted = false;
friend void arm::Instruction::exec(Cpu& cpu);
friend void thumb::Instruction::exec(Cpu& cpu);
@@ -79,32 +84,19 @@ class Cpu {
Psr und;
} spsr_banked = {}; // banked saved program status registers
inline void internal_cycle() { bus->internal_cycle(); }
void internal_cycle() { bus->internal_cycle(); }
// whether read is going to be sequential or not
bool sequential = true;
CpuAccess next_access = CpuAccess::Sequential;
// raw instructions in the pipeline
std::array<uint32_t, 2> opcodes = {};
inline void advance_pc_arm() { pc += arm::INSTRUCTION_SIZE; };
inline void advance_pc_thumb() { pc += thumb::INSTRUCTION_SIZE; }
void advance_pc_arm() { pc += arm::INSTRUCTION_SIZE; };
void advance_pc_thumb() { pc += thumb::INSTRUCTION_SIZE; }
bool is_flushed = false;
inline void flush_pipeline() {
if (cpsr.state() == State::Arm) {
opcodes[0] = bus->read_word(pc, false);
advance_pc_arm();
opcodes[1] = bus->read_word(pc);
advance_pc_arm();
} else {
opcodes[0] = bus->read_halfword(pc, false);
advance_pc_thumb();
opcodes[1] = bus->read_halfword(pc);
advance_pc_thumb();
}
sequential = true;
};
void flush_pipeline();
#ifdef GDB_DEBUG
friend class GdbRsp;