chore: enclose everything in namespace matar

Signed-off-by: Amneesh Singh <natto@weirdnatto.in>

apps/target/main.cc

@@ -15,7 +15,7 @@
 int
 main(int argc, const char* argv[]) {
     std::vector<uint8_t> rom;
-    std::array<uint8_t, Memory::BIOS_SIZE> bios = { 0 };
+    std::array<uint8_t, matar::Memory::BIOS_SIZE> bios = { 0 };
 
     auto usage = [argv]() {
         std::cerr << "Usage: " << argv[0] << " <file> [-b <bios>]" << std::endl;
@@ -65,7 +65,7 @@ main(int argc, const char* argv[]) {
         ifile.seekg(0, std::ios::end);
         bios_size = ifile.tellg();
 
-        if (bios_size != Memory::BIOS_SIZE) {
+        if (bios_size != matar::Memory::BIOS_SIZE) {
             throw std::ios::failure("BIOS file has invalid size",
                                     std::error_code());
         }
@@ -85,9 +85,9 @@ main(int argc, const char* argv[]) {
     std::flush(std::cout);
 
     try {
-        Memory memory(std::move(bios), std::move(rom));
+        matar::Memory memory(std::move(bios), std::move(rom));
-        Bus bus(memory);
+        matar::Bus bus(memory);
-        Cpu cpu(bus);
+        matar::Cpu cpu(bus);
         while (true) {
             cpu.step();
             sleep(2);

include/bus.hh

@@ -3,6 +3,7 @@
 #include "memory.hh"
 #include <memory>
 
+namespace matar {
 class Bus {
   public:
     Bus(const Memory& memory);
@@ -19,3 +20,4 @@ class Bus {
   private:
     std::shared_ptr<Memory> memory;
 };
+}

include/cpu/cpu.hh

@@ -1,5 +1,6 @@
 #include "bus.hh"
 
+namespace matar {
 class CpuImpl;
 
 class Cpu {
@@ -17,3 +18,4 @@ class Cpu {
   private:
     std::unique_ptr<CpuImpl> impl;
 };
+}

include/header.hh

@@ -3,6 +3,7 @@
 #include <cstdint>
 #include <string>
 
+namespace matar {
 struct Header {
     static constexpr uint8_t HEADER_SIZE = 192;
 
@@ -44,3 +45,4 @@ struct Header {
     uint32_t multiboot_entrypoint;
     uint8_t slave_id;
 };
+}

include/memory.hh

@@ -7,6 +7,7 @@
 #include <unordered_map>
 #include <vector>
 
+namespace matar {
 class Memory {
   public:
     static constexpr size_t BIOS_SIZE = 1024 * 16;
@@ -63,3 +64,4 @@ class Memory {
     Header header;
     void parse_header();
 };
+}

src/bus.cc

@@ -1,6 +1,7 @@
 #include "bus.hh"
 #include <memory>
 
+namespace matar {
 Bus::Bus(const Memory& memory)
   : memory(std::make_shared<Memory>(memory)) {}
 
@@ -33,3 +34,4 @@ void
 Bus::write_word(size_t address, uint32_t word) {
     memory->write_word(address, word);
 }
+}

src/cpu/arm/exec.cc

@@ -4,9 +4,10 @@
 
 using namespace logger;
 
+namespace matar {
 void
 CpuImpl::exec_arm(const arm::Instruction instruction) {
-    Condition cond            = instruction.condition;
+    arm::Condition cond       = instruction.condition;
     arm::InstructionData data = instruction.data;
 
     debug(cpsr.condition(cond));
@@ -537,3 +538,4 @@ CpuImpl::exec_arm(const arm::Instruction instruction) {
         } },
       data);
 }
+}

src/cpu/arm/instruction.cc

@@ -3,7 +3,8 @@
 #include "util/bits.hh"
 #include <iterator>
 
-using namespace arm;
+namespace matar {
+namespace arm {
 
 Instruction::Instruction(uint32_t insn)
   : condition(static_cast<Condition>(bit_range(insn, 28, 31))) {
@@ -495,3 +496,5 @@ Instruction::disassemble() {
         [](auto) { return std::string("unknown instruction"); } },
       data);
 }
+}
+}

src/cpu/arm/instruction.hh

@@ -1,3 +1,4 @@
+#pragma once
 #include "cpu/utility.hh"
 #include <cstdint>
 #include <variant>
@@ -9,6 +10,7 @@ struct overloaded : Ts... {
 template<class... Ts>
 overloaded(Ts...) -> overloaded<Ts...>;
 
+namespace matar {
 namespace arm {
 static constexpr size_t INSTRUCTION_SIZE = 4;
 
@@ -165,3 +167,4 @@ struct Instruction {
     std::string disassemble();
 };
 }
+}

src/cpu/cpu-impl.cc

@@ -7,6 +7,7 @@
 
 using namespace logger;
 
+namespace matar {
 CpuImpl::CpuImpl(const Bus& bus) noexcept
   : bus(std::make_shared<Bus>(bus))
   , gpr({ 0 })
@@ -142,3 +143,4 @@ CpuImpl::step() {
         }
     }
 }
+}

src/cpu/cpu-impl.hh

@@ -6,6 +6,7 @@
 
 #include <cstdint>
 
+namespace matar {
 class CpuImpl {
   public:
     CpuImpl(const Bus& bus) noexcept;
@@ -55,3 +56,4 @@ class CpuImpl {
         Psr und;
     } spsr_banked; // banked saved program status registers
 };
+}

src/cpu/cpu.cc

@@ -1,6 +1,7 @@
 #include "cpu/cpu.hh"
 #include "cpu-impl.hh"
 
+namespace matar {
 Cpu::Cpu(const Bus& bus) noexcept
   : impl(std::make_unique<CpuImpl>(bus)){};
 
@@ -10,3 +11,4 @@ void
 Cpu::step() {
     impl->step();
 };
+}

src/cpu/psr.cc

@@ -2,6 +2,7 @@
 #include "util/bits.hh"
 #include "util/log.hh"
 
+namespace matar {
 Psr::Psr(uint32_t raw)
   : psr(raw & PSR_CLEAR_RESERVED) {}
 
@@ -59,7 +60,9 @@ GET_SET_NTH_BIT_FUNCTIONS(n, 31);
 #undef GET_SET_NTH_BIT_FUNCTIONS
 
 bool
-Psr::condition(Condition cond) const {
+Psr::condition(arm::Condition cond) const {
+    using arm::Condition;
+
     switch (cond) {
         case Condition::EQ:
             return z();
@@ -95,3 +98,4 @@ Psr::condition(Condition cond) const {
 
     return false;
 }
+}

src/cpu/psr.hh

@@ -1,8 +1,10 @@
 #pragma once
 
+#include "arm/instruction.hh"
 #include "utility.hh"
 #include <cstdint>
 
+namespace matar {
 class Psr {
   public:
     // clear the reserved bits i.e, [8:27]
@@ -45,7 +47,7 @@ class Psr {
 
 #undef GET_SET_NTH_BIT_FUNCTIONS
 
-    bool condition(Condition cond) const;
+    bool condition(arm::Condition cond) const;
 
   private:
     static constexpr uint32_t PSR_CLEAR_RESERVED = 0xF00000FF;
@@ -53,3 +55,4 @@ class Psr {
 
     uint32_t psr;
 };
+}

src/cpu/utility.cc

@@ -2,6 +2,8 @@
 #include "util/bits.hh"
 #include <bit>
 
+namespace matar {
+namespace arm {
 std::ostream&
 operator<<(std::ostream& os, const Condition cond) {
 
@@ -133,3 +135,5 @@ operator<<(std::ostream& os, const ShiftType shift_type) {
 
     return os;
 }
+}
+}

src/cpu/utility.hh

@@ -5,6 +5,7 @@
 
 static constexpr size_t THUMB_INSTRUCTION_SIZE = 2;
 
+namespace matar {
 enum class Mode {
     /* M[4:0] in PSR */
     User       = 0b10000,
@@ -21,6 +22,7 @@ enum class State {
     Thumb = 1
 };
 
+namespace arm {
 enum class Condition {
     EQ = 0b0000,
     NE = 0b0001,
@@ -42,8 +44,6 @@ enum class Condition {
 // https://fmt.dev/dev/api.html#std-ostream-support
 std::ostream&
 operator<<(std::ostream& os, const Condition cond);
-template<>
-struct fmt::formatter<Condition> : ostream_formatter {};
 
 enum class OpCode {
     AND = 0b0000,
@@ -67,8 +67,6 @@ enum class OpCode {
 // https://fmt.dev/dev/api.html#std-ostream-support
 std::ostream&
 operator<<(std::ostream& os, const OpCode cond);
-template<>
-struct fmt::formatter<OpCode> : ostream_formatter {};
 
 enum class ShiftType {
     LSL = 0b00,
@@ -94,5 +92,12 @@ eval_shift(ShiftType shift_type, uint32_t value, uint8_t amount, bool& carry);
 // https://fmt.dev/dev/api.html#std-ostream-support
 std::ostream&
 operator<<(std::ostream& os, const ShiftType cond);
+}
+}
+
 template<>
-struct fmt::formatter<ShiftType> : ostream_formatter {};
+struct fmt::formatter<matar::arm::Condition> : ostream_formatter {};
+template<>
+struct fmt::formatter<matar::arm::OpCode> : ostream_formatter {};
+template<>
+struct fmt::formatter<matar::arm::ShiftType> : ostream_formatter {};

src/memory.cc

@@ -8,6 +8,7 @@
 
 using namespace logger;
 
+namespace matar {
 Memory::Memory(std::array<uint8_t, BIOS_SIZE>&& bios,
                std::vector<uint8_t>&& rom)
   : bios(std::move(bios))
@@ -232,3 +233,4 @@ Memory::parse_header() {
 
     // multiboot not required right now
 }
+}

src/meson.build

@@ -6,7 +6,7 @@ lib_sources = files(
 subdir('cpu')
 
 fmt = dependency('fmt', version : '>=10.1.0')
-lib = static_library(
+lib = library(
   meson.project_name(),
   lib_sources,
   dependencies: [fmt],

tests/cpu/arm/exec.cc

@@ -5,6 +5,7 @@
 #include <limits>
 #include <variant>
 
+using namespace matar;
 class CpuFixture {
   public:
     CpuFixture()
@@ -12,7 +13,8 @@ class CpuFixture {
                        std::vector<uint8_t>(Header::HEADER_SIZE)))) {}
 
   protected:
-    void exec(arm::InstructionData data, Condition condition = Condition::AL) {
+    void exec(arm::InstructionData data,
+              arm::Condition condition = arm::Condition::AL) {
         arm::Instruction instruction(condition, data);
         cpu.exec_arm(instruction);
     }

tests/cpu/arm/instruction.cc

@@ -4,7 +4,7 @@
 
 #define TAG "disassembler"
 
-using namespace arm;
+using namespace matar::arm;
 
 TEST_CASE("Branch and Exchange", TAG) {
     uint32_t raw = 0b11000001001011111111111100011010;