massive instruction rewrite

So, I ended up moving exec methods from Instruction to Cpu for
encapsulating cycle emulation, and this has caused me lots of pain since
I had to rewrite a shit ton of tests which are not even useful or
comprehensible, i do no know why i put myself through this

Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
This commit is contained in:
2024-06-20 06:07:00 +05:30
parent 7d3996526f
commit 1c96f418eb
12 changed files with 775 additions and 486 deletions

View File

@@ -11,20 +11,49 @@ class CpuFixture {
protected:
void exec(arm::InstructionData data, Condition condition = Condition::AL) {
// hack to account for one fetch cycle
bus->internal_cycle();
arm::Instruction instruction(condition, data);
instruction.exec(cpu);
cpu.exec(instruction);
}
void exec(thumb::InstructionData data) {
// hack to account for one fetch cycle
bus->internal_cycle();
thumb::Instruction instruction(data);
instruction.exec(cpu);
cpu.exec(instruction);
}
void reset(uint32_t value = 0) { setr(15, value + 8); }
uint32_t getr(uint8_t r) { return getr_(r, cpu); }
uint32_t getr(uint8_t r) {
uint32_t pc = 0;
void setr(uint8_t r, uint32_t value) { setr_(r, value, cpu); }
if (r != 15)
pc = getr_(15, cpu);
uint32_t ret = getr_(r, cpu);
if (r == 15)
pc = ret;
// undo PC advance
setr_(15, pc, cpu);
return ret;
}
void setr(uint8_t r, uint32_t value) {
uint32_t pc = getr_(15, cpu);
setr_(r, value, cpu);
// undo PC advance when r != 15
// when r is 15, setr_ takes account of pipeline flush
if (r != 15)
setr_(15, pc, cpu);
}
Psr psr(bool spsr = false);
@@ -35,7 +64,7 @@ class CpuFixture {
private:
// hack to get a register
uint32_t getr_(uint8_t r, Cpu& cpu);
uint32_t getr_(uint8_t r, Cpu tmp);
// hack to set a register
void setr_(uint8_t r, uint32_t value, Cpu& cpu);