memory: bus and rom should not be writeable
so fix tests and shit Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
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@@ -41,17 +41,17 @@ CpuFixture::set_psr(Psr psr, bool spsr) {
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// matters is that the public API is correct.
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uint32_t
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CpuFixture::getr_(uint8_t r, Cpu& cpu) {
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size_t addr = 13000;
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size_t offset = r == 15 ? 4 : 0;
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uint32_t word = bus.read_word(addr + offset);
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Cpu tmp = cpu;
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uint32_t ret = 0xFFFFFFFF;
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uint8_t base = r ? 0 : 1;
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uint32_t addr = 0x02000000;
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uint8_t offset = r == 15 ? 4 : 0;
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uint32_t word = bus.read_word(addr + offset);
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Cpu tmp = cpu;
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uint32_t ret = 0xFFFFFFFF;
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uint8_t base = r ? 0 : 1;
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// set R0/R1 = 0
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// set R0/R1 = addr
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arm::Instruction zero(
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Condition::AL,
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arm::DataProcessing{ .operand = 0u,
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arm::DataProcessing{ .operand = addr,
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.rd = base,
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.rn = 0,
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.set = false,
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@@ -60,7 +60,7 @@ CpuFixture::getr_(uint8_t r, Cpu& cpu) {
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// get register
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arm::Instruction get(
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Condition::AL,
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arm::SingleDataTransfer{ .offset = static_cast<uint16_t>(addr),
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arm::SingleDataTransfer{ .offset = static_cast<uint16_t>(0),
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.rd = r,
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.rn = base,
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.load = false,
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