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memory: bus and rom should not be writeable

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so fix tests and shit

Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
This commit is contained in:
Amneesh Singh
2023-10-05 00:21:18 +05:30
parent e0f7f32699
commit 174008f60c
8 changed files with 255 additions and 252 deletions
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16
src/cpu/thumb/exec.cc
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@@ -286,47 +286,51 @@ Instruction::exec(Cpu& cpu) {
},
[&cpu](AddOffsetStackPointer& data) { cpu.sp += data.word; },
[&cpu](PushPopRegister& data) {
static constexpr uint8_t alignment = 4;
if (data.load) {
for (uint8_t i = 0; i < 8; i++) {
if (get_bit(data.regs, i)) {
cpu.gpr[i] = cpu.bus->read_word(cpu.sp);
cpu.sp += 4;
cpu.sp += alignment;
}
}
if (data.pclr) {
cpu.pc = cpu.bus->read_word(cpu.sp);
cpu.sp += 4;
cpu.sp += alignment;
cpu.is_flushed = true;
}
} else {
if (data.pclr) {
cpu.sp -= 4;
cpu.sp -= alignment;
cpu.bus->write_word(cpu.sp, cpu.lr);
}
for (int8_t i = 7; i >= 0; i--) {
if (get_bit(data.regs, i)) {
cpu.sp -= 4;
cpu.sp -= alignment;
cpu.bus->write_word(cpu.sp, cpu.gpr[i]);
}
}
}
},
[&cpu](MultipleLoad& data) {
static constexpr uint8_t alignment = 4;
uint32_t rb = cpu.gpr[data.rb];
if (data.load) {
for (uint8_t i = 0; i < 8; i++) {
if (get_bit(data.regs, i)) {
cpu.gpr[i] = cpu.bus->read_word(rb);
rb += 4;
rb += alignment;
}
}
} else {
for (int8_t i = 7; i >= 0; i--) {
if (get_bit(data.regs, i)) {
rb -= 4;
rb -= alignment;
cpu.bus->write_word(rb, cpu.gpr[i]);
}
}