cpu/{arm|thumb}(chore): change how branch disassembly happens

Signed-off-by: Amneesh Singh <natto@weirdnatto.in>
This commit is contained in:
2024-06-11 23:03:44 +05:30
parent 0062ad424b
commit 15c4802838
10 changed files with 38 additions and 33 deletions

View File

@@ -24,18 +24,25 @@ TEST_CASE_METHOD(CpuFixture, "Branch", TAG) {
InstructionData data = Branch{ .link = false, .offset = 3489748 };
Branch* branch = std::get_if<Branch>(&data);
// set PC to 48
setr(15, 48);
exec(data);
CHECK(getr(15) == 3489748);
// 48 + offset
CHECK(getr(15) == 3489796);
CHECK(getr(14) == 0);
// with link
reset();
setr(15, 48);
branch->link = true;
exec(data);
CHECK(getr(15) == 3489748);
CHECK(getr(14) == 0 + INSTRUCTION_SIZE);
// 48 + offset
CHECK(getr(15) == 3489796);
// pc was set to 48
CHECK(getr(14) == 48 - INSTRUCTION_SIZE);
}
TEST_CASE_METHOD(CpuFixture, "Multiply", TAG) {

View File

@@ -31,15 +31,16 @@ TEST_CASE("Branch", TAG) {
// last 24 bits = 8748995
// (8748995 << 8) >> 6 sign extended = 0xFE15FF0C
// Also +8 since PC is two instructions ahead
CHECK(b->offset == 0xFE15FF14);
CHECK(b->offset == static_cast<int32_t>(0xfe15ff0c));
CHECK(b->link == true);
#ifdef DISASSEMBLER
CHECK(instruction.disassemble() == "BL 0xFE15FF14");
// take prefetch into account
// offset + 8 = 0xfe15ff0c + 8 = -0x1ea00e4 + 8
CHECK(instruction.disassemble() == "BL -0x1ea00ec");
b->link = false;
CHECK(instruction.disassemble() == "B 0xFE15FF14");
CHECK(instruction.disassemble() == "B -0x1ea00ec");
#endif
}

View File

@@ -412,7 +412,8 @@ TEST_CASE("Conditional Branch", TAG) {
CHECK(b->condition == Condition::LS);
#ifdef DISASSEMBLER
// (-76 << 1) + PC (0) + 4
// take prefetch into account
// offset + 4 = -152 + 4
CHECK(instruction.disassemble() == "BLS #-148");
#endif
}
@@ -439,7 +440,8 @@ TEST_CASE("Unconditional Branch") {
REQUIRE(b->offset == -410);
#ifdef DISASSEMBLER
// (2147483443 << 1) + PC(0) + 4
// take prefetch into account
// offset + 4 = -410 + 4
CHECK(instruction.disassemble() == "B #-406");
#endif
}