From 028c80f6cb99def928af57dadd91f2e6fc5c0a9e Mon Sep 17 00:00:00 2001 From: Amneesh Singh Date: Tue, 11 Jun 2024 22:46:48 +0530 Subject: [PATCH] comeback(?) Signed-off-by: Amneesh Singh --- .gitignore | 2 +- README.md | 13 +++++--- flake.lock | 30 +++++++----------- include/cpu/alu.hh | 1 - include/cpu/arm/instruction.hh | 4 +-- include/cpu/psr.hh | 1 - include/cpu/thumb/instruction.hh | 2 +- meson.build | 19 +---------- nix/matar-clang.nix | 11 ++----- nix/matar.nix | 9 +++--- src/cpu/alu.cc | 1 + src/cpu/arm/disassembler.cc | 54 +++++++++++++++++--------------- src/cpu/thumb/disassembler.cc | 49 +++++++++++++++-------------- src/meson.build | 7 ----- src/util/bits.hh | 2 +- src/util/crypto.hh | 4 +-- src/util/log.hh | 17 +++++----- 17 files changed, 97 insertions(+), 129 deletions(-) diff --git a/.gitignore b/.gitignore index d1f216a..fd2fcc6 100644 --- a/.gitignore +++ b/.gitignore @@ -3,5 +3,5 @@ result build/ .cache/ *~ -#*# +\#*\# .#* diff --git a/README.md b/README.md index 6b6a91f..96e7741 100644 --- a/README.md +++ b/README.md @@ -5,18 +5,21 @@ But if you are curious (probably not), read ahead # Dependencies ## Tested toolchains -- LLVM 16.0.6 -- GCC 12.3.0 +- LLVM 18.1.7 +- GCC 14.1.0 -In theory, any toolchain supporting at least the C++20 standard should work. +In theory, any toolchain supporting at least the c++23 standard should work. I am using LLVM's clang and libcxx as the primary toolchain. ## Static libraries | Name | Version | Required? | |:------:|:----------|:---------:| -| fmt | >= 10.1.1 | yes | | catch2 | >= 3.4 | for tests | This goes without saying but using a different toolchain to compile these libraries before linking probably won't work. -I will add meson wrap support once LLVM 17 is out, since I want to get rid of fmt. + +----- + +# LOG +- June 11, 2024: After almost an year, I have come back to this silly abandoned project, will probably complete it soon. diff --git a/flake.lock b/flake.lock index 8a05118..899cce3 100644 --- a/flake.lock +++ b/flake.lock @@ -5,11 +5,11 @@ "nixpkgs-lib": "nixpkgs-lib" }, "locked": { - "lastModified": 1693611461, - "narHash": "sha256-aPODl8vAgGQ0ZYFIRisxYG5MOGSkIczvu2Cd8Gb9+1Y=", + "lastModified": 1717285511, + "narHash": "sha256-iKzJcpdXih14qYVcZ9QC9XuZYnPc6T8YImb6dX166kw=", "owner": "hercules-ci", "repo": "flake-parts", - "rev": "7f53fdb7bdc5bb237da7fefef12d099e4fd611ca", + "rev": "2a55567fcf15b1b1c7ed712a2c6fadaec7412ea8", "type": "github" }, "original": { @@ -20,11 +20,11 @@ }, "nixpkgs": { "locked": { - "lastModified": 1695806987, - "narHash": "sha256-fX5kGs66NZIxCMcpAGIpxuftajHL8Hil1vjHmjjl118=", + "lastModified": 1717868076, + "narHash": "sha256-c83Y9t815Wa34khrux81j8K8ET94ESmCuwORSKm2bQY=", "owner": "nixos", "repo": "nixpkgs", - "rev": "f3dab3509afca932f3f4fd0908957709bb1c1f57", + "rev": "cd18e2ae9ab8e2a0a8d715b60c91b54c0ac35ff9", "type": "github" }, "original": { @@ -36,20 +36,14 @@ }, "nixpkgs-lib": { "locked": { - "dir": "lib", - "lastModified": 1693471703, - "narHash": "sha256-0l03ZBL8P1P6z8MaSDS/MvuU8E75rVxe5eE1N6gxeTo=", - "owner": "NixOS", - "repo": "nixpkgs", - "rev": "3e52e76b70d5508f3cec70b882a29199f4d1ee85", - "type": "github" + "lastModified": 1717284937, + "narHash": "sha256-lIbdfCsf8LMFloheeE6N31+BMIeixqyQWbSr2vk79EQ=", + "type": "tarball", + "url": "https://github.com/NixOS/nixpkgs/archive/eb9ceca17df2ea50a250b6b27f7bf6ab0186f198.tar.gz" }, "original": { - "dir": "lib", - "owner": "NixOS", - "ref": "nixos-unstable", - "repo": "nixpkgs", - "type": "github" + "type": "tarball", + "url": "https://github.com/NixOS/nixpkgs/archive/eb9ceca17df2ea50a250b6b27f7bf6ab0186f198.tar.gz" } }, "root": { diff --git a/include/cpu/alu.hh b/include/cpu/alu.hh index 24d01df..ce77f6f 100644 --- a/include/cpu/alu.hh +++ b/include/cpu/alu.hh @@ -1,6 +1,5 @@ #pragma once #include -#include namespace matar { enum class ShiftType { diff --git a/include/cpu/arm/instruction.hh b/include/cpu/arm/instruction.hh index 92724ae..027bbe2 100644 --- a/include/cpu/arm/instruction.hh +++ b/include/cpu/arm/instruction.hh @@ -2,7 +2,7 @@ #include "cpu/alu.hh" #include "cpu/psr.hh" #include -#include +#include #include namespace matar { @@ -215,7 +215,7 @@ struct Instruction { Instruction(uint32_t insn); Instruction(Condition condition, InstructionData data) : condition(condition) - , data(data){}; + , data(data) {}; void exec(Cpu& cpu); diff --git a/include/cpu/psr.hh b/include/cpu/psr.hh index 7b24574..0e206b2 100644 --- a/include/cpu/psr.hh +++ b/include/cpu/psr.hh @@ -1,7 +1,6 @@ #pragma once #include -#include namespace matar { enum class Mode { diff --git a/include/cpu/thumb/instruction.hh b/include/cpu/thumb/instruction.hh index cbc11f7..19c4a55 100644 --- a/include/cpu/thumb/instruction.hh +++ b/include/cpu/thumb/instruction.hh @@ -3,7 +3,7 @@ #include "cpu/alu.hh" #include "cpu/psr.hh" #include -#include +#include #include namespace matar { diff --git a/meson.build b/meson.build index 9119326..9bc3fce 100644 --- a/meson.build +++ b/meson.build @@ -4,28 +4,11 @@ project('matar', 'cpp', default_options : ['warning_level=3', 'werror=true', 'optimization=3', - 'cpp_std=c++20', + 'cpp_std=c++23', 'default_library=static']) compiler = meson.get_compiler('cpp') -''' -TODO: use and instead of libfmt once LLVM 17 is out - -if compiler.has_argument('-std=c++2c') - add_global_arguments('-std=c++2c', language: 'cpp') -elif compiler.has_argument('-std=c++23') - add_global_arguments('-std=c++23', language: 'cpp') -elif compiler.has_argument('-std=c++2b') - add_global_arguments('-std=c++2b', language: 'cpp') -elif compiler.has_argument('-std=c++20') - add_global_arguments('-std=c++20', language: 'cpp') -else - error(compiler.get_id() + ' ' + compiler.version() + 'does not meet the compiler requirements') -endif - -''' - subdir('include') subdir('src') subdir('apps') diff --git a/nix/matar-clang.nix b/nix/matar-clang.nix index e305da7..6a10ca2 100644 --- a/nix/matar-clang.nix +++ b/nix/matar-clang.nix @@ -1,17 +1,10 @@ { ... }: { perSystem = { pkgs, src, ... }: let - llvm = pkgs.llvmPackages_16; + llvm = pkgs.llvmPackages_18; stdenv = llvm.libcxxStdenv; libraries = with pkgs; [ - ((pkgs.fmt.override { - inherit stdenv; - enableShared = false; - }).overrideAttrs (oa: { - cmakeFlags = oa.cmakeFlags ++ [ "-DFMT_TEST=off" ]; - })).dev - (catch2_3.override { inherit stdenv; }).out ]; in @@ -19,7 +12,7 @@ packages.matar-clang = pkgs.callPackage ./build.nix { inherit src libraries stdenv; }; devShells.matar-clang = pkgs.callPackage ./shell.nix { inherit libraries stdenv; - tools = with pkgs; [ (clang-tools_16.override { enableLibcxx = true; }) ]; + tools = with pkgs; [ (clang-tools_18.override { enableLibcxx = true; }) ]; }; }; } diff --git a/nix/matar.nix b/nix/matar.nix index 552720a..07578d6 100644 --- a/nix/matar.nix +++ b/nix/matar.nix @@ -1,13 +1,14 @@ { ... }: { perSystem = { pkgs, src, ... }: let + stdenv = pkgs.gcc14Stdenv; + libraries = with pkgs; [ - (pkgs.fmt.override { enableShared = false; }).dev - catch2_3.out + (catch2_3.override { inherit stdenv; }).out ]; in { - packages.matar = pkgs.callPackage ./build.nix { inherit src libraries; }; - devShells.matar = pkgs.callPackage ./shell.nix { inherit libraries; }; + packages.matar = pkgs.callPackage ./build.nix { inherit src libraries stdenv; }; + devShells.matar = pkgs.callPackage ./shell.nix { inherit libraries stdenv; }; }; } diff --git a/src/cpu/alu.cc b/src/cpu/alu.cc index 8e81347..108e880 100644 --- a/src/cpu/alu.cc +++ b/src/cpu/alu.cc @@ -1,5 +1,6 @@ #include "cpu/alu.hh" #include "util/bits.hh" +#include namespace matar { uint32_t diff --git a/src/cpu/arm/disassembler.cc b/src/cpu/arm/disassembler.cc index 13f3c46..1c9850e 100644 --- a/src/cpu/arm/disassembler.cc +++ b/src/cpu/arm/disassembler.cc @@ -1,5 +1,7 @@ #include "cpu/arm/instruction.hh" #include "util/bits.hh" +#include +#include namespace matar::arm { std::string @@ -9,15 +11,15 @@ Instruction::disassemble() { return std::visit( overloaded{ [condition](BranchAndExchange& data) { - return fmt::format("BX{} R{:d}", condition, data.rn); + return std::format("BX{} R{:d}", condition, data.rn); }, [condition](Branch& data) { - return fmt::format( + return std::format( "B{}{} 0x{:06X}", (data.link ? "L" : ""), condition, data.offset); }, [condition](Multiply& data) { if (data.acc) { - return fmt::format("MLA{}{} R{:d},R{:d},R{:d},R{:d}", + return std::format("MLA{}{} R{:d},R{:d},R{:d},R{:d}", condition, (data.set ? "S" : ""), data.rd, @@ -25,7 +27,7 @@ Instruction::disassemble() { data.rs, data.rn); } else { - return fmt::format("MUL{}{} R{:d},R{:d},R{:d}", + return std::format("MUL{}{} R{:d},R{:d},R{:d}", condition, (data.set ? "S" : ""), data.rd, @@ -34,7 +36,7 @@ Instruction::disassemble() { } }, [condition](MultiplyLong& data) { - return fmt::format("{}{}{}{} R{:d},R{:d},R{:d},R{:d}", + return std::format("{}{}{}{} R{:d},R{:d},R{:d},R{:d}", (data.uns ? 'U' : 'S'), (data.acc ? "MLAL" : "MULL"), condition, @@ -46,7 +48,7 @@ Instruction::disassemble() { }, [](Undefined) { return std::string("UND"); }, [condition](SingleDataSwap& data) { - return fmt::format("SWP{}{} R{:d},R{:d},[R{:d}]", + return std::format("SWP{}{} R{:d},R{:d},[R{:d}]", condition, (data.byte ? "B" : ""), data.rd, @@ -62,18 +64,18 @@ Instruction::disassemble() { expression = ""; } else { expression = - fmt::format(",{}#{:d}", (data.up ? '+' : '-'), *offset); + std::format(",{}#{:d}", (data.up ? '+' : '-'), *offset); } } else if (const Shift* shift = std::get_if(&data.offset)) { // Shifts are always immediate in single data transfer - expression = fmt::format(",{}R{:d},{} #{:d}", + expression = std::format(",{}R{:d},{} #{:d}", (data.up ? '+' : '-'), shift->rm, stringify(shift->data.type), shift->data.operand); } - return fmt::format( + return std::format( "{}{}{}{} R{:d},[R{:d}{}]{}", (data.load ? "LDR" : "STR"), condition, @@ -91,15 +93,15 @@ Instruction::disassemble() { if (data.offset == 0) { expression = ""; } else { - expression = fmt::format( + expression = std::format( ",{}#{:d}", (data.up ? '+' : '-'), data.offset); } } else { expression = - fmt::format(",{}R{:d}", (data.up ? '+' : '-'), data.offset); + std::format(",{}R{:d}", (data.up ? '+' : '-'), data.offset); } - return fmt::format( + return std::format( "{}{}{}{} R{:d},[R{:d}{}]{}", (data.load ? "LDR" : "STR"), condition, @@ -115,12 +117,12 @@ Instruction::disassemble() { for (uint8_t i = 0; i < 16; i++) { if (get_bit(data.regs, i)) - fmt::format_to(std::back_inserter(regs), "R{:d},", i); + std::format_to(std::back_inserter(regs), "R{:d},", i); }; regs.pop_back(); - return fmt::format("{}{}{}{} R{:d}{},{{{}}}{}", + return std::format("{}{}{}{} R{:d}{},{{{}}}{}", (data.load ? "LDM" : "STM"), condition, (data.up ? 'I' : 'D'), @@ -132,12 +134,12 @@ Instruction::disassemble() { }, [condition](PsrTransfer& data) { if (data.type == PsrTransfer::Type::Mrs) { - return fmt::format("MRS{} R{:d},{}", + return std::format("MRS{} R{:d},{}", condition, data.operand, (data.spsr ? "SPSR_all" : "CPSR_all")); } else { - return fmt::format( + return std::format( "MSR{} {}_{},{}{}", condition, (data.spsr ? "SPSR" : "CPSR"), @@ -153,9 +155,9 @@ Instruction::disassemble() { if (const uint32_t* operand = std::get_if(&data.operand)) { - op_2 = fmt::format("#{:d}", *operand); + op_2 = std::format("#{:d}", *operand); } else if (const Shift* shift = std::get_if(&data.operand)) { - op_2 = fmt::format("R{:d},{} {}{:d}", + op_2 = std::format("R{:d},{} {}{:d}", shift->rm, stringify(shift->data.type), (shift->data.immediate ? '#' : 'R'), @@ -165,7 +167,7 @@ Instruction::disassemble() { switch (data.opcode) { case OpCode::MOV: case OpCode::MVN: - return fmt::format("{}{}{} R{:d},{}", + return std::format("{}{}{} R{:d},{}", stringify(data.opcode), condition, (data.set ? "S" : ""), @@ -175,13 +177,13 @@ Instruction::disassemble() { case OpCode::TEQ: case OpCode::CMP: case OpCode::CMN: - return fmt::format("{}{} R{:d},{}", + return std::format("{}{} R{:d},{}", stringify(data.opcode), condition, data.rn, op_2); default: - return fmt::format("{}{}{} R{:d},R{:d},{}", + return std::format("{}{}{} R{:d},R{:d},{}", stringify(data.opcode), condition, (data.set ? "S" : ""), @@ -191,11 +193,11 @@ Instruction::disassemble() { } }, [condition](SoftwareInterrupt) { - return fmt::format("SWI{}", condition); + return std::format("SWI{}", condition); }, [condition](CoprocessorDataTransfer& data) { - std::string expression = fmt::format(",#{:d}", data.offset); - return fmt::format( + std::string expression = std::format(",#{:d}", data.offset); + return std::format( "{}{}{} p{:d},c{:d},[R{:d}{}]{}", (data.load ? "LDC" : "STC"), condition, @@ -207,7 +209,7 @@ Instruction::disassemble() { (data.pre ? (data.write ? "!" : "") : expression)); }, [condition](CoprocessorDataOperation& data) { - return fmt::format("CDP{} p{},{},c{},c{},c{},{}", + return std::format("CDP{} p{},{},c{},c{},c{},{}", condition, data.cpn, data.cp_opc, @@ -217,7 +219,7 @@ Instruction::disassemble() { data.cp); }, [condition](CoprocessorRegisterTransfer& data) { - return fmt::format("{}{} p{},{},R{},c{},c{},{}", + return std::format("{}{} p{},{},R{},c{},c{},{}", (data.load ? "MRC" : "MCR"), condition, data.cpn, diff --git a/src/cpu/thumb/disassembler.cc b/src/cpu/thumb/disassembler.cc index 79bd974..f8f325b 100644 --- a/src/cpu/thumb/disassembler.cc +++ b/src/cpu/thumb/disassembler.cc @@ -1,5 +1,6 @@ #include "cpu/thumb/instruction.hh" #include "util/bits.hh" +#include namespace matar::thumb { std::string @@ -7,14 +8,14 @@ Instruction::disassemble(uint32_t pc) { return std::visit( overloaded{ [](MoveShiftedRegister& data) { - return fmt::format("{} R{:d},R{:d},#{:d}", + return std::format("{} R{:d},R{:d},#{:d}", stringify(data.opcode), data.rd, data.rs, data.offset); }, [](AddSubtract& data) { - return fmt::format("{} R{:d},R{:d},{}{:d}", + return std::format("{} R{:d},R{:d},{}{:d}", stringify(data.opcode), data.rd, data.rs, @@ -22,27 +23,27 @@ Instruction::disassemble(uint32_t pc) { data.offset); }, [](MovCmpAddSubImmediate& data) { - return fmt::format( + return std::format( "{} R{:d},#{:d}", stringify(data.opcode), data.rd, data.offset); }, [](AluOperations& data) { - return fmt::format( + return std::format( "{} R{:d},R{:d}", stringify(data.opcode), data.rd, data.rs); }, [](HiRegisterOperations& data) { if (data.opcode == HiRegisterOperations::OpCode::BX) { - return fmt::format("{} R{:d}", stringify(data.opcode), data.rs); + return std::format("{} R{:d}", stringify(data.opcode), data.rs); } - return fmt::format( + return std::format( "{} R{:d},R{:d}", stringify(data.opcode), data.rd, data.rs); }, [](PcRelativeLoad& data) { - return fmt::format("LDR R{:d},[PC,#{:d}]", data.rd, data.word); + return std::format("LDR R{:d},[PC,#{:d}]", data.rd, data.word); }, [](LoadStoreRegisterOffset& data) { - return fmt::format("{}{} R{:d},[R{:d},R{:d}]", + return std::format("{}{} R{:d},[R{:d},R{:d}]", (data.load ? "LDR" : "STR"), (data.byte ? "B" : ""), data.rd, @@ -51,11 +52,11 @@ Instruction::disassemble(uint32_t pc) { }, [](LoadStoreSignExtendedHalfword& data) { if (!data.s && !data.h) { - return fmt::format( + return std::format( "STRH R{:d},[R{:d},R{:d}]", data.rd, data.rb, data.ro); } - return fmt::format("{}{} R{:d},[R{:d},R{:d}]", + return std::format("{}{} R{:d},[R{:d},R{:d}]", (data.s ? "LDS" : "LDR"), (data.h ? 'H' : 'B'), data.rd, @@ -63,7 +64,7 @@ Instruction::disassemble(uint32_t pc) { data.ro); }, [](LoadStoreImmediateOffset& data) { - return fmt::format("{}{} R{:d},[R{:d},#{:d}]", + return std::format("{}{} R{:d},[R{:d},#{:d}]", (data.load ? "LDR" : "STR"), (data.byte ? "B" : ""), data.rd, @@ -71,33 +72,33 @@ Instruction::disassemble(uint32_t pc) { data.offset); }, [](LoadStoreHalfword& data) { - return fmt::format("{} R{:d},[R{:d},#{:d}]", + return std::format("{} R{:d},[R{:d},#{:d}]", (data.load ? "LDRH" : "STRH"), data.rd, data.rb, data.offset); }, [](SpRelativeLoad& data) { - return fmt::format("{} R{:d},[SP,#{:d}]", + return std::format("{} R{:d},[SP,#{:d}]", (data.load ? "LDR" : "STR"), data.rd, data.word); }, [](LoadAddress& data) { - return fmt::format("ADD R{:d},{},#{:d}", + return std::format("ADD R{:d},{},#{:d}", data.rd, (data.sp ? "SP" : "PC"), data.word); }, [](AddOffsetStackPointer& data) { - return fmt::format("ADD SP,#{:d}", data.word); + return std::format("ADD SP,#{:d}", data.word); }, [](PushPopRegister& data) { std::string regs; for (uint8_t i = 0; i < 16; i++) { if (get_bit(data.regs, i)) - fmt::format_to(std::back_inserter(regs), "R{:d},", i); + std::format_to(std::back_inserter(regs), "R{:d},", i); }; if (data.load) { @@ -106,14 +107,14 @@ Instruction::disassemble(uint32_t pc) { else regs.pop_back(); - return fmt::format("POP {{{}}}", regs); + return std::format("POP {{{}}}", regs); } else { if (data.pclr) regs += "LR"; else regs.pop_back(); - return fmt::format("PUSH {{{}}}", regs); + return std::format("PUSH {{{}}}", regs); } }, [](MultipleLoad& data) { @@ -121,31 +122,31 @@ Instruction::disassemble(uint32_t pc) { for (uint8_t i = 0; i < 16; i++) { if (get_bit(data.regs, i)) - fmt::format_to(std::back_inserter(regs), "R{:d},", i); + std::format_to(std::back_inserter(regs), "R{:d},", i); }; regs.pop_back(); - return fmt::format( + return std::format( "{} R{}!,{{{}}}", (data.load ? "LDMIA" : "STMIA"), data.rb, regs); }, [](SoftwareInterrupt& data) { - return fmt::format("SWI {:d}", data.vector); + return std::format("SWI {:d}", data.vector); }, [pc](ConditionalBranch& data) { - return fmt::format( + return std::format( "B{} #{:d}", stringify(data.condition), static_cast(data.offset + pc + 2 * INSTRUCTION_SIZE)); }, [pc](UnconditionalBranch& data) { - return fmt::format( + return std::format( "B #{:d}", static_cast(data.offset + pc + 2 * INSTRUCTION_SIZE)); }, [](LongBranchWithLink& data) { // duh this manual be empty for H = 0 - return fmt::format( + return std::format( "BL{} #{:d}", (data.high ? "H" : ""), data.offset); }, [](auto) { return std::string("unknown instruction"); } }, diff --git a/src/meson.build b/src/meson.build index 72b8722..e7ca05b 100644 --- a/src/meson.build +++ b/src/meson.build @@ -8,12 +8,6 @@ subdir('cpu') lib_cpp_args = [] -fmt = dependency('fmt', version : '>=10.1.0', static: true) -if not fmt.found() - fmt = dependency('fmt', version : '>=10.1.0', static: false) - lib_cpp_args += '-DFMT_HEADER_ONLY' -endif - if get_option('disassembler') lib_cpp_args += '-DDISASSEMBLER' endif @@ -21,7 +15,6 @@ endif lib = library( meson.project_name(), lib_sources, - dependencies: [fmt], include_directories: inc, install: true, cpp_args: lib_cpp_args diff --git a/src/util/bits.hh b/src/util/bits.hh index 3be421f..1d13886 100644 --- a/src/util/bits.hh +++ b/src/util/bits.hh @@ -35,6 +35,6 @@ inline Int bit_range(Int num, size_t start, size_t end) { // NOTE: we do not require -1 if it is a signed integral Int left = - std::numeric_limits::digits - (std::is_unsigned::value) - end; + std::numeric_limits::digits - (!std::is_signed::value) - end; return static_cast(num << left) >> (left + start); } diff --git a/src/util/crypto.hh b/src/util/crypto.hh index f0c4a11..515f0f3 100644 --- a/src/util/crypto.hh +++ b/src/util/crypto.hh @@ -2,7 +2,7 @@ #include #include -#include +#include #include // Why I wrote this myself? I do not know @@ -110,7 +110,7 @@ sha256(std::array& data) { for (j = 0; j < 8; j++) for (i = 0; i < 4; i++) - fmt::format_to(std::back_inserter(string), + std::format_to(std::back_inserter(string), "{:02x}", ((h[j] >> (24 - i * 8)) & 0xFF)); diff --git a/src/util/log.hh b/src/util/log.hh index 50825a4..1b5762a 100644 --- a/src/util/log.hh +++ b/src/util/log.hh @@ -1,8 +1,7 @@ #pragma once #include "util/loglevel.hh" -#include -#include +#include namespace logging { namespace ansi { @@ -14,7 +13,7 @@ static constexpr auto BOLD = "\033[1m"; static constexpr auto RESET = "\033[0m"; } -using fmt::print; +using std::print; class Logger { using LogLevel = matar::LogLevel; @@ -27,12 +26,12 @@ class Logger { } template - void log(const fmt::format_string& fmt, Args&&... args) { - fmt::println(stream, fmt, std::forward(args)...); + void log(const std::format_string& fmt, Args&&... args) { + std::println(stream, fmt, std::forward(args)...); } template - void debug(const fmt::format_string& fmt, Args&&... args) { + void debug(const std::format_string& fmt, Args&&... args) { if (level & static_cast(LogLevel::Debug)) { print(stream, "{}{}[DEBUG] ", ansi::MAGENTA, ansi::BOLD); log(fmt, std::forward(args)...); @@ -41,7 +40,7 @@ class Logger { } template - void info(const fmt::format_string& fmt, Args&&... args) { + void info(const std::format_string& fmt, Args&&... args) { if (level & static_cast(LogLevel::Info)) { print(stream, "{}[INFO] ", ansi::WHITE); log(fmt, std::forward(args)...); @@ -50,7 +49,7 @@ class Logger { } template - void warn(const fmt::format_string& fmt, Args&&... args) { + void warn(const std::format_string& fmt, Args&&... args) { if (level & static_cast(LogLevel::Warn)) { print(stream, "{}[WARN] ", ansi::YELLOW); log(fmt, std::forward(args)...); @@ -59,7 +58,7 @@ class Logger { } template - void error(const fmt::format_string& fmt, Args&&... args) { + void error(const std::format_string& fmt, Args&&... args) { if (level & static_cast(LogLevel::Error)) { print(stream, "{}{}[ERROR] ", ansi::RED, ansi::BOLD); log(fmt, std::forward(args)...);